PEB20571中文資料英飛凌數(shù)據(jù)手冊PDF規(guī)格書
PEB20571規(guī)格書詳情
Addendum to “DELIC Clock System Synchronization”
The DELIC Clock System Synchronization is described in the DELIC-LC PEB 20570/DELIC-PB PEB 20571 Data Sheet, independent of the version (2.1 .. 3.1).
As an addendum to chapter “DELIC Clock System Synchronization” of the DELICLC/DELIC-PB Data Sheet the following describes the system behaviour when using the VIP PEB 20590 or PEB 20591 in LT-T mode, for example when synchronizing to the Central Office.
When the Central Office is activated, its clock signal is retrieved by the RxPLL of the VIP and a 1.536 MHz reference signal is generated and used as input signal for the DELIC DCXO (pin XCLK). This signal is divided down to 8 kHz and used as input for the DCXO phase detector (PD). The second input to PD is another 8 kHz signal which originates from the 16.384 MHz output of the DCXO.
The DELIC PLL multiplies the 16.384 MHz DCXO signal up to 61.44 MHz. A divider generates the 15.36 MHz layer 1 clock which is used to clock the VIP.
產(chǎn)品屬性
- 型號：
PEB20571
- 制造商：
INFINEON
- 制造商全稱：
Infineon Technologies AG
- 功能描述：
DSP Embedded Line and Port Interface Controller
| 供應(yīng)商 | 型號 | 品牌 | 批號 | 封裝 | 庫存 | 備注 | 價(jià)格 |
|---|---|---|---|---|---|---|---|
Infineon(英飛凌) |
23+ |
6000 |
誠信服務(wù)，絕對原裝原盤 |
詢價(jià) | |||
INFINEON |
03+ |
QFP |
14 |
一級代理,專注軍工、汽車、醫(yī)療、工業(yè)、新能源、電力 |
詢價(jià) | ||
SIEMENS/INFI |
23+ |
QFP-100 |
3000 |
全新原裝、誠信經(jīng)營、公司現(xiàn)貨銷售! |
詢價(jià) | ||
infineon |
QFP |
68500 |
一級代理 原裝正品假一罰十價(jià)格優(yōu)勢長期供貨 |
詢價(jià) | |||
INFINEON |
23+ |
N/A |
19526 |
詢價(jià) | |||
INF |
23+ |
PEB20571FV2. |
13528 |
振宏微原裝正品,假一罰百 |
詢價(jià) | ||
INFINEON |
24+ |
TQFP100 |
2978 |
100%全新原裝公司現(xiàn)貨供應(yīng)!隨時可發(fā)貨 |
詢價(jià) | ||
Infine |
21+ |
25000 |
原廠原包 深圳現(xiàn)貨 主打品牌 假一賠百 可開票! |
詢價(jià) | |||
INFINEON/英飛凌 |
23+ |
QFP |
3000 |
一級代理原廠VIP渠道,專注軍工、汽車、醫(yī)療、工業(yè)、 |
詢價(jià) | ||
INFINEON/英飛凌 |
23+ |
NA/ |
3253 |
原廠直銷,現(xiàn)貨供應(yīng),賬期支持! |
詢價(jià) |
