首頁>IDT5V2528APGI>規(guī)格書詳情
IDT5V2528APGI中文資料IDT數(shù)據(jù)手冊PDF規(guī)格書
| 廠商型號 |
IDT5V2528APGI |
| 功能描述 | 2.5V / 3.3V PHASE-LOCK LOOP CLOCK DRIVER ZERO DELAY BUFFER |
| 文件大小 |
61.64 Kbytes |
| 頁面數(shù)量 |
7 頁 |
| 生產(chǎn)廠商 | Integrated Device Technology, Inc. |
| 企業(yè)簡稱 |
IDT |
| 中文名稱 | Integrated Device Technology, Inc.官網(wǎng) |
| 原廠標(biāo)識 |  |
| 數(shù)據(jù)手冊 | |
| 更新時間 | 2025-5-24 23:01:00 |
| 人工找貨 | IDT5V2528APGI價格和庫存，歡迎聯(lián)系客服免費人工找貨 |
IDT5V2528APGI規(guī)格書詳情
DESCRIPTION:
The IDT5V2528 is a high performance, low-skew, low-jitter, phase-lock loop (PLL) clock driver. It uses a PLL to precisely align, in both frequency and phase, the feedback (FBOUT) output to the clock (CLK) input signal.
FEATURES:
? Operates at 3.3V VDD/AVDD and 2.5V/3.3V VDDQ
? 1:10 fanout
? 3-level inputs for output control
? External feedback (FBIN) pin is used to synchronize the outputs to the clock input signal
? No external RC network required for PLL loop stability
? Configurable 2.5V or 3.3V LVTTL outputs
? tPD Phase Error at 100MHz to 166MHz: ±150ps
? Jitter (peak-to-peak) at 133MHz and 166MHz: ±75ps
? Spread spectrum compatible
? Operating Frequency:
? Std: 25MHz to 140MHz
? A: 25MHz to 167MHz
? Available in TSSOP package
| 供應(yīng)商 | 型號 | 品牌 | 批號 | 封裝 | 庫存 | 備注 | 價格 |
|---|---|---|---|---|---|---|---|
IDT(Renesas收購) |
24+ |
NA/ |
8735 |
原廠直銷,現(xiàn)貨供應(yīng),賬期支持! |
詢價 | ||
IDT |
TSSOP-28PIN |
9 |
一級代理,專注軍工、汽車、醫(yī)療、工業(yè)、新能源、電力 |
詢價 | |||
INTEGRATEDDE |
23+ |
65480 |
詢價 | ||||
IDT |
23+ |
SOP8 |
200 |
原裝現(xiàn)貨假一賠十 |
詢價 | ||
IDT |
25+23+ |
SOP8 |
34906 |
絕對原裝正品全新進(jìn)口深圳現(xiàn)貨 |
詢價 | ||
IDT |
2015+ |
SOP |
5700 |
進(jìn)口原裝正品 能17%開增值發(fā)票 |
詢價 | ||
IDT |
SOP |
1200 |
正品原裝--自家現(xiàn)貨-實單可談 |
詢價 | |||
IDT |
19+ |
TSSOP-28PIN |
74037 |
原廠代理渠道,每一顆芯片都可追溯原廠； |
詢價 | ||
IDT |
24+ |
SOP8 |
5000 |
全新原裝正品,現(xiàn)貨銷售 |
詢價 | ||
IDT |
SOP |
3350 |
一級代理 原裝正品假一罰十價格優(yōu)勢長期供貨 |
詢價 |
