HDM8515P中文資料海力士數(shù)據(jù)手冊(cè)PDF規(guī)格書
| 廠商型號(hào) |
HDM8515P |
| 功能描述 | DVB/DSS Compliant Receiver |
| 文件大小 |
272.85 Kbytes |
| 頁面數(shù)量 |
75 頁 |
| 生產(chǎn)廠商 | Hynix Semiconductor |
| 企業(yè)簡(jiǎn)稱 |
Hynix【海力士】 |
| 中文名稱 | 海力士半導(dǎo)體官網(wǎng) |
| 原廠標(biāo)識(shí) |  |
| 數(shù)據(jù)手冊(cè) | |
| 更新時(shí)間 | 2025-4-9 17:40:00 |
| 人工找貨 | HDM8515P價(jià)格和庫存，歡迎聯(lián)系客服免費(fèi)人工找貨 |
HDM8515P規(guī)格書詳情
Introduction to the HDM8515
The HDM8515 digital demodulator for direct broadcast satellite receivers is a single chip solution fully compliant with the European Telecommunications Standards Institute (ETSI) specification ETS 300 421. This chip integrates an A/D converter, a variable rate matched filter, a variable rate QPSK demodulator with a Viterbi decoder, a deinterleaver and a Reed Solomon decoder.
Features and Benefits
* Fully DVB&DSS compliant
* Dual 6bit A/D converters
* Continuously variable symbol rate from 1Msps to 66Msps (90MHz clock)
* Internal digital root raised cosine filter
* Less than 0.5 dB implementation loss
* Frequency multiplexing capability
* Automated frequency search
* Internal bias cancellation
* Both wideband and narrowband AGC
* Noise calibration for antenna steering
* Output data rate as high as 82Mbps
* Fixed frequency sampling clock
* Simple interface with tuner and analog processing
* Microcontroller interface
* Eight bit parallel or I2C monitor and control interface
* I2C by-pass mode
* DiSeqC 1.2 interface support
* Dual Carrier Loop Filter
產(chǎn)品屬性
- 型號(hào)：
HDM8515P
- 制造商：
HYNIX
- 制造商全稱：
Hynix Semiconductor
- 功能描述：
DVB/DSS Compliant Receiver
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