HDM8513中文資料海力士數(shù)據(jù)手冊PDF規(guī)格書

Introduction to the HDM8513A

The HDM8513A digital demodulator for direct broadcast satellite receivers is a single chip solution fully compliant with the European Telecommunications Standards Institute (ETSI) specification ETS 300 421. This chip integrates an A/D converter, a variable rate matched filter, a variable rate QPSK demodulator with a Viterbi decoder, a deinterleaver and a Reed Solomon decoder.

Features and Benefits

* Fully DVB&DSS compliant

* Dual 6bit A/D converters

* Continuously variable symbol rate from 1Msps to 55Msps (75MHz clock)

* Internal digital root raised cosine filter

* Less than 0.5 dB implementation loss

* Frequency multiplexing capability

* Automated frequency search

* Internal bias cancellation

* Both wideband and narrowband AGC

* Noise calibration for antenna steering

* Output data rate as high as 68Mbps

* Fixed frequency sampling clock

* Simple interface with tuner and analog processing

* Microcontroller interface

* Eight bit parallel or I2C monitor and control interface

* I2C by-pass mode

* Two package types