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CY23S08ZC-1HT中文資料賽普拉斯數(shù)據(jù)手冊(cè)PDF規(guī)格書
CY23S08ZC-1HT規(guī)格書詳情
Functional Description
The CY23S08 is a 3.3V zero delay buffer designed to distribute high speed clocks in PC, workstation, datacom, telecom, and other high performance applications.
The part has an on-chip PLL which locks to an input clock presented on the REF pin. The PLL feedback must be driven into the FBK pin, and obtained from one of the outputs. The input-to-output propagation delay is less than 350 ps, and output-to-output skew is less than 250 ps.
Features
■ Zero input output propagation delay, adjustable by capacitive load on FBK input
■ Multiple configurations (see Table 3 on page 3)
■ Multiple low-skew outputs
? 45 ps typical output-output skew (–1)
? Two banks of four outputs, three-stateable by two select inputs
■ 10 MHz to 140 MHz operating range
■ 65 ps typical cycle-cycle jitter (–1, –1H)
■ Advanced 0.65μ CMOS technology
■ Space saving 16-pin, 150-mil SOIC/TSSOP packages
■ 3.3V operation
■ Spread Aware
產(chǎn)品屬性
- 型號(hào):
CY23S08ZC-1HT
- 制造商:
CYPRESS
- 制造商全稱:
Cypress Semiconductor
- 功能描述:
3.3V Zero Delay Buffer
供應(yīng)商 | 型號(hào) | 品牌 | 批號(hào) | 封裝 | 庫存 | 備注 | 價(jià)格 |
---|---|---|---|---|---|---|---|
CYPRESS |
23+ |
SOP16 |
20000 |
原廠原裝正品現(xiàn)貨 |
詢價(jià) | ||
CY |
24+ |
SOP14 |
23 |
詢價(jià) | |||
Cypress Semiconductor Corp |
24+ |
16-TSSOP(0.173 4.40mm 寬) |
9350 |
獨(dú)立分銷商 公司只做原裝 誠心經(jīng)營 免費(fèi)試樣正品保證 |
詢價(jià) | ||
CY |
2019+ |
SOP16 |
6000 |
只做自己庫存,全新原裝進(jìn)口正品假一賠百,可開13%增 |
詢價(jià) | ||
CYPRESS |
24+ |
TSSOP-16 |
4028 |
優(yōu)勢現(xiàn)貨 |
詢價(jià) | ||
CYPRESS(賽普拉斯) |
23+ |
TSSOP16 |
1543 |
原裝現(xiàn)貨,免費(fèi)供樣,技術(shù)支持,原廠對(duì)接 |
詢價(jià) | ||
Cypress Semiconductor Corp |
22+ |
NA |
500000 |
萬三科技,秉承原裝,購芯無憂 |
詢價(jià) | ||
CYPRESS/賽普拉斯 |
2021+ |
SOP16 |
100500 |
一級(jí)代理專營品牌!原裝正品,優(yōu)勢現(xiàn)貨,長期排單到貨 |
詢價(jià) | ||
CY |
22+ |
SOP16 |
32350 |
原裝正品 假一罰十 公司現(xiàn)貨 |
詢價(jià) | ||
CY |
0501+ |
SOP16 |
100 |
一級(jí)代理,專注軍工、汽車、醫(yī)療、工業(yè)、新能源、電力 |
詢價(jià) |