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CY23S08ZC-1H中文資料賽普拉斯數(shù)據(jù)手冊(cè)PDF規(guī)格書(shū)
CY23S08ZC-1H規(guī)格書(shū)詳情
Functional Description
The CY23S08 is a 3.3V zero delay buffer designed to distribute high speed clocks in PC, workstation, datacom, telecom, and other high performance applications.
The part has an on-chip PLL which locks to an input clock presented on the REF pin. The PLL feedback must be driven into the FBK pin, and obtained from one of the outputs. The input-to-output propagation delay is less than 350 ps, and output-to-output skew is less than 250 ps.
Features
■ Zero input output propagation delay, adjustable by capacitive load on FBK input
■ Multiple configurations (see Table 3 on page 3)
■ Multiple low-skew outputs
? 45 ps typical output-output skew (–1)
? Two banks of four outputs, three-stateable by two select inputs
■ 10 MHz to 140 MHz operating range
■ 65 ps typical cycle-cycle jitter (–1, –1H)
■ Advanced 0.65μ CMOS technology
■ Space saving 16-pin, 150-mil SOIC/TSSOP packages
■ 3.3V operation
■ Spread Aware
產(chǎn)品屬性
- 型號(hào):
CY23S08ZC-1H
- 制造商:
Cypress Semiconductor
供應(yīng)商 | 型號(hào) | 品牌 | 批號(hào) | 封裝 | 庫(kù)存 | 備注 | 價(jià)格 |
---|---|---|---|---|---|---|---|
Cypress |
16-TSSOP |
40 |
Cypress一級(jí)分銷,原裝原盒原包裝! |
詢價(jià) | |||
CYPRESS |
2138+ |
原廠標(biāo)準(zhǔn)封裝 |
8960 |
代理CYPRESS全系列芯片,原裝現(xiàn)貨 |
詢價(jià) | ||
CYPRESS/賽普拉斯 |
22+ |
TSSOP16 |
12245 |
現(xiàn)貨,原廠原裝假一罰十! |
詢價(jià) | ||
CYPRESS |
22+ |
NA |
30000 |
100%全新原裝 假一賠十 |
詢價(jià) | ||
CYPRESS(賽普拉斯) |
23+ |
TSSOP16 |
1543 |
原裝現(xiàn)貨,免費(fèi)供樣,技術(shù)支持,原廠對(duì)接 |
詢價(jià) | ||
CYPRESS |
2020+ |
TSSOP16 |
8000 |
只做自己庫(kù)存,全新原裝進(jìn)口正品假一賠百,可開(kāi)13%增 |
詢價(jià) | ||
CYPRESS/賽普拉斯 |
23+ |
TSSOP-16 |
10000 |
原廠授權(quán)一級(jí)代理,專業(yè)海外優(yōu)勢(shì)訂貨,價(jià)格優(yōu)勢(shì)、品種 |
詢價(jià) | ||
CYPRESS/賽普拉斯 |
23+ |
TSSOP16 |
5000 |
專注配單,只做原裝進(jìn)口現(xiàn)貨 |
詢價(jià) | ||
CYPRESS/賽普拉斯 |
2021+ |
SOP16 |
100500 |
一級(jí)代理專營(yíng)品牌!原裝正品,優(yōu)勢(shì)現(xiàn)貨,長(zhǎng)期排單到貨 |
詢價(jià) | ||
CY |
24+ |
SOP14 |
23 |
詢價(jià) |