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74AC11074D

Marking：AC11074；Package：SOIC；DUAL POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOP WITH CLEAR AND PRESET

Center-PinVCCandGNDConfigurations MinimizeHigh-SpeedSwitchingNoise EPIC(Enhanced-PerformanceImplanted CMOS)1-μmProcess 500-mATypicalLatch-UpImmunityat 125°C PackageOptionsIncludePlastic Small-Outline(D)andThinShrink Small-Outline(PW)Packages,and StandardPlastic3

TI2Texas Instruments

德州儀器美國德州儀器公司

74AC11074DR

Marking：AC11074；Package：SOIC；DUAL POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOP WITH CLEAR AND PRESET

Center-PinVCCandGNDConfigurations MinimizeHigh-SpeedSwitchingNoise EPIC(Enhanced-PerformanceImplanted CMOS)1-μmProcess 500-mATypicalLatch-UpImmunityat 125°C PackageOptionsIncludePlastic Small-Outline(D)andThinShrink Small-Outline(PW)Packages,and StandardPlastic3

TI2Texas Instruments

德州儀器美國德州儀器公司

74AC11074DR.A

Marking：AC11074；Package：SOIC；DUAL POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOP WITH CLEAR AND PRESET

Center-PinVCCandGNDConfigurations MinimizeHigh-SpeedSwitchingNoise EPIC(Enhanced-PerformanceImplanted CMOS)1-μmProcess 500-mATypicalLatch-UpImmunityat 125°C PackageOptionsIncludePlastic Small-Outline(D)andThinShrink Small-Outline(PW)Packages,and StandardPlastic3

TI2Texas Instruments

德州儀器美國德州儀器公司

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