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74F112SJ

DualJKNegativeEdge-TriggeredFlip-Flop

FairchildFairchild Semiconductor

仙童半導(dǎo)體飛兆/仙童半導(dǎo)體公司

74F112SJ

DualJKNegativeEdge-TriggeredFlip-Flop

GeneralDescription The74F112containstwoindependent,high-speedJKflipflopswithDirectSetandClearinputs.Synchronousstatechangesareinitiatedbythefallingedgeoftheclock.Triggeringoccursatavoltageleveloftheclockandisnotdirectlyrelatedtothetransitiontime.TheJ

FairchildFairchild Semiconductor

仙童半導(dǎo)體飛兆/仙童半導(dǎo)體公司

I74F112D

DualJ-Knegativeedge-triggeredflip-flop

DESCRIPTION The74F112,DualNegativeEdge-TriggeredJK-TypeFlip-Flop,featureindividualJ,K,Clock(CPn),Set(SD)andReset(RD)inputs,true(Qn)andcomplementary(Qn)outputs. TheSDandRDinputs,whenLow,setorresettheoutputsasshownintheFunctionTable,regardlessofthelevel

PhilipsNXP Semiconductors

飛利浦荷蘭皇家飛利浦

I74F112N

DualJ-Knegativeedge-triggeredflip-flop

DESCRIPTION The74F112,DualNegativeEdge-TriggeredJK-TypeFlip-Flop,featureindividualJ,K,Clock(CPn),Set(SD)andReset(RD)inputs,true(Qn)andcomplementary(Qn)outputs. TheSDandRDinputs,whenLow,setorresettheoutputsasshownintheFunctionTable,regardlessofthelevel

PhilipsNXP Semiconductors

飛利浦荷蘭皇家飛利浦

MC74F112

DUALJKNEGATIVEEDGE-TRIGGEREDFLIP-FLOP

TheMC74F112containstwoindependent,high-speedJKflip-flopswithDirectSetandClearinputs.Synchronousstatechangesareinitiatedbythefallingedgeoftheclock.Triggeringoccursatavoltageleveloftheclockandisnotdirectlyrelatedtothetransitiontime.TheJandKinputscanc

MotorolaMotorola, Inc

摩托羅拉加爾文制造公司

MC74F112D

DUALJKNEGATIVEEDGE-TRIGGEREDFLIP-FLOP

TheMC74F112containstwoindependent,high-speedJKflip-flopswithDirectSetandClearinputs.Synchronousstatechangesareinitiatedbythefallingedgeoftheclock.Triggeringoccursatavoltageleveloftheclockandisnotdirectlyrelatedtothetransitiontime.TheJandKinputscanc

MotorolaMotorola, Inc

摩托羅拉加爾文制造公司

MC74F112J

DUALJKNEGATIVEEDGE-TRIGGEREDFLIP-FLOP

TheMC74F112containstwoindependent,high-speedJKflip-flopswithDirectSetandClearinputs.Synchronousstatechangesareinitiatedbythefallingedgeoftheclock.Triggeringoccursatavoltageleveloftheclockandisnotdirectlyrelatedtothetransitiontime.TheJandKinputscanc

MotorolaMotorola, Inc

摩托羅拉加爾文制造公司

MC74F112N

DUALJKNEGATIVEEDGE-TRIGGEREDFLIP-FLOP

TheMC74F112containstwoindependent,high-speedJKflip-flopswithDirectSetandClearinputs.Synchronousstatechangesareinitiatedbythefallingedgeoftheclock.Triggeringoccursatavoltageleveloftheclockandisnotdirectlyrelatedtothetransitiontime.TheJandKinputscanc

MotorolaMotorola, Inc

摩托羅拉加爾文制造公司

N74F112D

DualJ-Knegativeedge-triggeredflip-flop

DESCRIPTION The74F112,DualNegativeEdge-TriggeredJK-TypeFlip-Flop,featureindividualJ,K,Clock(CPn),Set(SD)andReset(RD)inputs,true(Qn)andcomplementary(Qn)outputs. TheSDandRDinputs,whenLow,setorresettheoutputsasshownintheFunctionTable,regardlessofthelevel

PhilipsNXP Semiconductors

飛利浦荷蘭皇家飛利浦

N74F112N

DualJ-Knegativeedge-triggeredflip-flop

DESCRIPTION The74F112,DualNegativeEdge-TriggeredJK-TypeFlip-Flop,featureindividualJ,K,Clock(CPn),Set(SD)andReset(RD)inputs,true(Qn)andcomplementary(Qn)outputs. TheSDandRDinputs,whenLow,setorresettheoutputsasshownintheFunctionTable,regardlessofthelevel

PhilipsNXP Semiconductors

飛利浦荷蘭皇家飛利浦

詳細參數(shù)

  • 型號:

    74F112SC_Q

  • 功能描述:

    觸發(fā)器 Dual J-K Flip-Flop

  • RoHS:

  • 制造商:

    Texas Instruments

  • 電路數(shù)量:

    2

  • 邏輯系列:

    SN74

  • 邏輯類型:

    D-Type Flip-Flop

  • 極性:

    Inverting, Non-Inverting

  • 輸入類型:

    CMOS

  • 傳播延遲時間:

    4.4 ns

  • 高電平輸出電流:

    - 16 mA

  • 低電平輸出電流:

    16 mA

  • 電源電壓-最大:

    5.5 V

  • 最大工作溫度:

    + 85 C

  • 安裝風(fēng)格:

    SMD/SMT

  • 封裝/箱體:

    X2SON-8

  • 封裝:

    Reel

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更多74F112SC_Q供應(yīng)商 更新時間2025-1-22 14:30:00