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ZSP200中文資料LSI數(shù)據(jù)手冊PDF規(guī)格書

ZSP200
廠商型號

ZSP200

功能描述

Highly Efficient Quad-MAC DSP Core

文件大小

63.36 Kbytes

頁面數(shù)量

2

生產(chǎn)廠商 LSI Computer Systems
企業(yè)簡稱

LSI

中文名稱

LSI Computer Systems官網(wǎng)

原廠標識
數(shù)據(jù)手冊

下載地址一下載地址二到原廠下載

更新時間

2025-1-13 18:12:00

ZSP200規(guī)格書詳情

OVERVIEW

The ZSP540 processor core is a high-performance/power-efficient QuadMAC/Six-ALU implementation of the ZSP?G2 architecture. The ZSP540 utilizes a 16-bit architecture with extensive 32-bit capabilities and sets an unmatched balance of performance/power/size and memory utilization efficiency. The Z.Turbo feature provides the SOC designer with the option to extend the ZSP540 Instruction Set and the ability to add application-specific acceleration logic.

CORE FEATURES

? Quad-MAC/Six-ALU DSP core

? 4+1 instructions per cycle

? Up to 350MHz, 8-stage pipeline design

? Up to 1750 million instructions/sec

? Dual 64-bit wide Load/Store data ports

? Z.Turbo coprocessor extensions capable

? 24-bit address space

? HW managed instructions scheduling

? HW/SW controlled power management

? Real-time trace and profiling capability

? Full AMBA/AHB support (optional)

? JTAG debug interface

? Static, single phase clocked design

? Compatible with all other ZSP cores

ARCHITECTURE FEATURES

? Embedded control processing efficiency

? 32-bit addressing capabilities

? 16 and 32-bit standard instruction set

? Extensive 32-bit and 40-bit support

? Easy to program instruction set

? Load/store register based instructions

? Outstanding code density

? User extensible instruction set

APPLICATION BENEFITS

?High-performance DSP capabilities

?Excellent power/cost/speed balance

?Excellent multimedia audio/video processing

?Power efficient baseband processing performance

?DSP and system control functions handling capabilities

CORE FEATURES

? Quad-MAC/Six-ALU DSP core

? 4+1 instructions per cycle

? Up to 350MHz, 8-stage pipeline design

? Up to 1750 million instructions/sec

? Dual 64-bit wide Load/Store data ports

? Z.Turbo coprocessor extensions capable

? 24-bit address space

? HW managed instructions scheduling

? HW/SW controlled power management

? Real-time trace and profiling capability

? Full AMBA/AHB support (optional)

? JTAG debug interface

? Static, single phase clocked design

? Compatible with all other ZSP cores

ARCHITECTURE FEATURES

? Embedded control processing efficiency

? 32-bit addressing capabilities

? 16 and 32-bit standard instruction set

? Extensive 32-bit and 40-bit support

產(chǎn)品屬性

  • 型號:

    ZSP200

  • 制造商:

    LSI

  • 制造商全稱:

    LSI

  • 功能描述:

    Highly Efficient Quad-MAC DSP Core

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