W981216BH中文資料華邦電子數(shù)據(jù)手冊(cè)PDF規(guī)格書(shū)

GENERAL DESCRIPTION

W981216BH is a high-speed synchronous dynamic random access memory (SDRAM), organized as 2M words x 4 banks x 16 bits. Using pipelined architecture and 0.175 μm process technology, W981216BH delivers a data bandwidth of up to 143M words per second (-7). To fully comply with the personal computer industrial standard, W981216BH is sorted into three speed grades: -7, -75, and - 8H. The -7 is compliant to the 143 MHz/CL3 or PC133/CL2 specification, the -75 is compliant to the PC133/CL3 specification, the -8H is compliant to the PC100/CL2 specification. For handheld device application, we also provide a low power option, the grade of 75L, with Self Refresh Current under 600μA.

FEATURES

? 3.3V ±0.3V Power Supply

? Up to 143 MHz Clock Frequency

? 2,097,152 Words x 4 banks x 16 bits organization

? Self Refresh Mode: Standard and Low Power

? CAS Latency: 2 and 3

? Burst Length: 1, 2, 4, 8, and full page

? Burst Read, Single Writes Mode

? Byte Data Controlled by DQM

? Power-Down Mode

? Auto-precharge and Controlled Precharge

? 4K Refresh cycles / 64 mS

? Interface: LVTTL

? Packaged in TSOP II 54 pin, 400 mil - 0.80