UPD2845GR-E2中文資料瑞薩數(shù)據(jù)手冊PDF規(guī)格書

DESCRIPTION

PPD2845GR is a PLL synthesizer LSI for pager system. This LSI is manufactured using low voltage CMOS process and therefore realized the low power consumption PLL operated on 1 V, 1.3 mA. This LSI is packaged in 16 pin plastic SSOP suitable for high-density surface mounting. So, this product contributes to produce a long-life-battery and physically-small pager system.

FEATURES

? Operating frequency : · Input frequency : fin = 10 MHz to 94 MHz

· Reference oscillating frequency : fx’tal = 12.8 MHz

? Low Supply voltage : · PLL block : VDD1 = 1.00 V to 1.15 V @ fin = 10 MHz to 70 MHz

VDD1 = 1.05 V to 1.15 V @ fin = 10 MHz to 94 MHz

· Charge pump block: VDD2 = 3.0 V ± 300 mV

? Low power consumption ? IDD = 1.3 mA TYP. @ fin = 70 MHz, fx’tal = 12.8 MHz

? Equipped with power-save function ? Serial data can be received in power-save mode.

? Packaged in 16 pin plastic SSOP suitable for high-density surface mounting.