UPB1009K-E1中文資料瑞薩數(shù)據(jù)手冊PDF規(guī)格書

FEATURES

? Double conversion : fREFin = 16.368 MHz, f1stIFin = 61.380 MHz, f2ndIFin = 4.092 MHz

: fREFin = 14.4, 16.384, 19.2, 26 MHz, f1stIFin = 62.980 MHz, f2ndIFin = 2.556 MHz

? Multiple system clocks : On-chip switchable frequency divider (1/N = 100, 3/256, 9/1024, 65/4096)

? A/D converter : On-chip 4-bit A/D converter

? High-density RF block : On-chip VCO tank circuit and 2ndIF filter

? Supply voltage : VCC = 2.7 to 3.3 V

? Low current consumption : ICC = 26.0 mA TYP. @ VCC = 3.0 V, N = 100

? High-density surface mountable : 44-pin plastic QFN