首頁(yè)>TWL6040>規(guī)格書詳情

TWL6040集成電路(IC)編解碼器規(guī)格書PDF中文資料

TWL6040
廠商型號(hào)

TWL6040

參數(shù)屬性

TWL6040 封裝/外殼為120-VFBGA;包裝為托盤;類別為集成電路(IC) > 編解碼器;產(chǎn)品描述:IC AUDIO CODEC 8CH LP 120BGA

功能描述

TWL6040 8-Channel Low-Power Audio Codec for Portable Applications
IC AUDIO CODEC 8CH LP 120BGA

文件大小

458.17 Kbytes

頁(yè)面數(shù)量

15 頁(yè)

生產(chǎn)廠商 Texas Instruments
企業(yè)簡(jiǎn)稱

TI德州儀器

中文名稱

美國(guó)德州儀器公司官網(wǎng)

原廠標(biāo)識(shí)
數(shù)據(jù)手冊(cè)

原廠下載下載地址一下載地址二到原廠下載

更新時(shí)間

2024-10-23 22:58:00

TWL6040規(guī)格書詳情

1.1 Features 1

? Four Audio Digital-to-Analog Converter (DAC)

Channels

? Stereo Capless Headphone Drivers:

– Up to 104-dB DR

– Power Tune for Performance and Power

Consumption Tradeoff

? Stereo 8 Ω, 1.5 W per Channel Speaker Drivers

? Differential Earpiece Driver

? Stereo Line-Out

? Two Audio Analog-to-Digital Converter (ADC)

Channels:

– 96-dBA SNR

? Four Audio Inputs:

– Three Differential Microphone Inputs

– Stereo Line-In and FM Input

? Two Vibrator and Haptics Feedback Channels:

– Differential H-Bridge Drivers

? Two Low-Noise Analog Microphone Bias Outputs

? Two Digital Microphone Bias Outputs

? Analog Low-Power Loop from Line-in to

Headphone and Speaker Outputs

? Dual Phase-Locked Loops (PLLs) for Flexible

Clock Support:

– 32-kHz Sleep Clock Input for System Low-

Power Playback Mode

– 12-, 19.2-, 26-, and 38.4-MHz System Clock

Input

? Accessory Plug and Unplug Detection, Accessory

Button Press Detection

? Integrated Power Supplies:

– Negative Charge Pump for Capless Headphone

Driver

– Two Low Dropout Voltage Regulators (LDOs)

for High Power Supply Rejection Ratio (PSRR)

? I2C Control

? Thermal Protection:

– Host Interrupt

? Power Supplies:

– Analog: 2.1 V

– Digital I/O: 1.8 V

– Battery: 2.3 to 5.5 V

? Package 6-mm × 6-mm 120-Pin PBGA

1.2 Applications

? Mobile and Smart Phones

? MP3 Players

? Handheld Devices

1.3 Description

The TWL6040 device is an audio coder/decoder (codec) with a high level of integration providing analog

audio codec functions for portable applications, as shown in Figure 1-1. The device contains multiple

audio analog inputs and outputs, as well as microphone biases and accessory detection. The device is

connected to the OMAP? 4 host processor through a proprietary PDM interface for audio data

communication enabling partitioning with optimized power consumption and performance. Multichannel

audio data is multiplexed to a single wire for downlink (PDML) and uplink (PDMUL).

The OMAP4 device provides the TWL6040 device with five PDM audio-input channels (DL0–DL4).

Channels DL0–DL3 are connected to four parallel DAC channels multiplexed to stereo headphone (HSL,

HSR), stereo speaker (HFL, HFR), and earpiece (EAR) or stereo line outputs (AUXL, AUXR).

The stereo headphone path has a low-power (LP) mode operating from a 32-kHz sleep clock to enable

more than 100 hours of MP3 playback time. Very-high dynamic range of 104 dBA is achieved when using

the system clock input and DAC path high-performance (HP) mode. Class-AB headphone drivers provide

a 1-Vrms capability output and are ground centered for capless connection to a headphone, thus enabling

system size and cost reduction. The earpiece driver is a differential class-AB driver with 2 Vrms capability

to a typical 32-Ω load or 1.4 Vrms to a typical 16-Ω load.

Stereo speaker path has filterless class-D outputs with 1.5-W capability per channel. Output power

maximization supply connections to an external boost is supported. Speaker drivers also support hearing

aid coil loads. For vibrator and haptic feedback support, the TWL6040 has two PWM channels with

independent input signals from DL4 or inter-integrated circuit (I2C).

Vibrator drivers are differential H-bridge outputs, enabling fast acceleration and deceleration of vibrator

motor. An external driver for a hearing aid coil or a piezo speaker requiring high voltage can be connected

to line outputs.

The TWL6040 supports three differential microphone inputs (MMIC, HMIC, and SMIC) and a stereo lineinput

(AFML, AFMR) multiplexed to two parallel ADCs. The PDM output from the ADCs is transmitted to

the OMAP4 processor through UL0 and UL1. AFML, AFMR inputs can also be looped to analog outputs

(LB0, LB1).

Two LDOs provide a voltage of 2.1 V to bias analog microphones (MBIAS and HBIAS). The maximum

output current is 2 mA for each analog bias, allowing up to two microphones on one bias. Two LDOs

provide a voltage of 1.8 V/1.85 V to bias digital microphones (DBIAS1 and DBIAS2). One bias generator

can bias several digital microphones at the same time, with a total maximum output current of 10 mA.

The TWL6040 has an integrated negative charge pump (NCP) and two LDOs (HS LDO and LS LDO) for

high PSRR. The only external supply needed is 2.1 V, which is available from the 2.1-V DC-DC of the

TWL6030 power-management IC (PMIC) in the OMAP4 system. By powering audio from low-noise 2.1-V

DC-DC of low power consumption, high dynamic range and high output swing at headset output are

achieved. All other supply inputs can be directly connected to battery or system 1.8-V I/O.

Two integrated PLLs enable operation from a 12-, 19.2-, 26-, and 38.4-MHz system clock (MCLK) or, in

LP playback mode, from a 32-kHz sleep clock (CLK32K). The frequency plan is based on a 48-kS/s audio

data rate for all channels, and host processor uses sample-rate converters to interface with different

sample rates (for example, 44.1 kHz). In the specific case of low-power audio playback, the TWL6040

supports the 44.1-kS/s and 48-kS/s rates. Transitions between sample rates or input clocks are seamless.

Accessory plug and unplug detections are supported (PLUGDET). Some headsets have a manual switch

for submitting send/end signal to the terminal through the microphone input pin. This feature is supported

by a periodic accessory button press detection to minimize current consumption in sleep mode. Detection

cycle properties can be programmed according to system requirements.

TWL6040屬于集成電路(IC) > 編解碼器。美國(guó)德州儀器公司制造生產(chǎn)的TWL6040編解碼器編解碼器是用于通過(guò)壓縮和解壓縮來(lái)轉(zhuǎn)換數(shù)據(jù)的半導(dǎo)體器件。數(shù)據(jù)壓縮可提高傳輸速度并減少存儲(chǔ)空間。某些編解碼器提供高達(dá) 32 位的分辨率,并且分別提供多達(dá) 6 個(gè)或 8 個(gè)模數(shù)轉(zhuǎn)換器和數(shù)模轉(zhuǎn)換器。除三角積分調(diào)制外,還有 I2C、I2S、SPI、串行、HDA、S/DIF、PCM、USB、AC'97 和 SLIMbus 數(shù)據(jù)接口。

產(chǎn)品屬性

更多
  • 產(chǎn)品編號(hào):

    TWL6040A2ZQZ

  • 制造商:

    Texas Instruments

  • 類別:

    集成電路(IC) > 編解碼器

  • 包裝:

    托盤

  • 類型:

    音頻

  • 數(shù)據(jù)接口:

    I2C,串行

  • ADC/DAC 數(shù):

    2 / 4

  • 三角積分:

    無(wú)

  • 電壓 - 供電,模擬:

    2.1V

  • 電壓 - 供電,數(shù)字:

    1.8V

  • 工作溫度:

    -30°C ~ 85°C

  • 安裝類型:

    表面貼裝型

  • 封裝/外殼:

    120-VFBGA

  • 供應(yīng)商器件封裝:

    120-BGA Microstar Junior(6x6)

  • 描述:

    IC AUDIO CODEC 8CH LP 120BGA

供應(yīng)商 型號(hào) 品牌 批號(hào) 封裝 庫(kù)存 備注 價(jià)格
TI
2016+
BGA120
2500
主營(yíng)TI,絕對(duì)原裝,假一賠十,可開17%增值稅發(fā)票!
詢價(jià)
TI
23+
N/A
7560
原廠原裝
詢價(jià)
TI
20+
BGA
19570
原裝優(yōu)勢(shì)主營(yíng)型號(hào)-可開原型號(hào)增稅票
詢價(jià)
TI
23+
BGA
20000
原廠原裝正品現(xiàn)貨
詢價(jià)
TI
2023+
BGA
80000
一級(jí)代理/分銷渠道價(jià)格優(yōu)勢(shì) 十年芯程一路只做原裝正品
詢價(jià)
專營(yíng)TI
2102+
BGA
6854
只做原廠原裝正品假一賠十!
詢價(jià)
21+
BGA
6000
全新原裝 現(xiàn)貨 價(jià)優(yōu)
詢價(jià)
TI/德州儀器
22+
BGA
9000
原裝正品
詢價(jià)
TI/德州儀器
21+
BGA
9800
只做原裝正品假一賠十!正規(guī)渠道訂貨!
詢價(jià)
TexasInstruments
18+
ICAUDIOCODEC8CHLP120BGA
6800
公司原裝現(xiàn)貨/歡迎來(lái)電咨詢!
詢價(jià)