TSC80251G1D-16CB中文資料Temic數(shù)據(jù)手冊PDF規(guī)格書

Description

The TSC87251G1A products are derivatives of the TEMIC Microcontroller family based on the extended 8–bit C251 Architecture. This family of products is tailored to 8–bit microcontroller applications requiring an increased instruction throughput, a reduced operating frequency or a larger addressable memory space. The architecture can provide a significant code size reduction when compiling C programs while fully preserving the legacy of C51 assembly routines.

The TSC87251G1A derivatives are pin–out and software compatible with standard 80C51/Fx/Rx with extended on–chip data memory (1 Kbyte RAM), on–chip memory (16 Kbytes EPROM/OTPROM) and up to 256 Kbytes of external code and data. They provide transparent enhancements to Intel’s 87C251Sx family with an additional Synchronous Serial Link Controller (SSLC supporting I2C, μWire and SPI protocols), a Keyboard interrupt interface and Power Monitoring and Management features.

Features

? Pin–Out and software compatibility with standard 80C51 products and 80C51FA/FB/RA/RB

? Plug–in replacement of Intel’s 80C251Sx

? C251 core: Intel’s MCS? 251 step A compliance

? 125 ns Instruction cycle time at 16 MHz

? 40–byte Register File

? Registers Accessible as Bytes, Words or Dwords

? Six–stage instruction Pipeline

? 16–bit Internal Code Fetch

? Enriched C51 Instruction Set

? 16–bit and 32–bit ALU

? Compare and Conditional Jump Instructions

? Expanded Set of Move Instructions

? Linear Addressing

? 1 Kbyte of on–chip RAM

? External memory space (Code/Data) programmable from 64 Kbytes to 256 Kbytes

? TSC87251G1A: 16 Kbytes of on–chip EPROM/OTPROM (production with TSC83251G1D: on–chip masked ROM version)

? SINGLE–PULSE Programming Algorithm

? Four 8–bit parallel I/O Ports (Ports 0, 1, 2 and 3 of the standard 80C51)

? Serial I/O Port: full duplex UART (80C51 compatible) with independent Baud Rate Generator

? SSLC: Synchronous Serial Link Controller

? I2C master only protocol

? μWire and SPI master only protocol

? Three 16–bit Timers/Counters (Timers 0, 1 and 2 of the standard 80C51)

? EWC: Event and Waveform Controller

? Compatible with Intel’s Programmable Counter Array (PCA)

? Common 16–bit Timer/Counter reference with four possible clock sources (Fosc/4, Fosc/12, Timer 1 and external input)

? Five modules with four programmable modes:

– 16–bit software Timer/Counter

– 16–bit Timer/Counter Capture Input and software pulse measurement

– High–speed output and 16–bit software Pulse Width Modulation (PWM)

– 8–bit hardware PWM without overhead

? 16–bit Watchdog Timer/Counter capability

? Secured 14–bit Hardware Watchdog Timer

? Power Monitoring and Management

? Power–Fail reset

? Power–On reset (integrated on the chip)

? Power–Off flag (cold and warm resets)

? Software programmable system clock

? Idle and Power–Down modes

? Keyboard interrupt interface on Port 1

? ONCE mode and full speed Real–Time In–Circuit Emulation support (Third Party Vendors)

? Speed ranges:

? 0 to 16 MHz

? Supply ranges:

? 5 V ±10

? Temperature ranges:

? Commercial (0°C to +70°C)

? Industrial (–40°C to +85°C)

? Option: extended range (–55°C to +125°C)

? Packages:

? PDIL 40, PLCC 44

? UV–Window CQPJ 44

? Options: known good dice and ceramic packages

Typical Applications

? ISDN terminals

? High–Speed modems

? PABX (SOHO)

? Networking

? Line cards

? Computer peripherals

? Printers

? Plotters

? Scanners

? Banking machines

? Barcode readers

? Smart cards readers

? High–end digital monitors

? High–end joysticks