TPS73230DBVR集成電路（IC）的線性+開關(guān)穩(wěn)壓器規(guī)格書PDF中文資料

1 Features

? Stable with no output capacitor or any value or

type of capacitor

? Input voltage range: 1.7V to 5.5V

? Ultra-low dropout voltage: 40mV typical at 250mA

? Excellent load transient response—with or without

optional output capacitor

? NMOS topology provides low reverse leakage

current

? Low noise: 30μVRMS typical (10kHz to 100kHz)

? 0.5% initial accuracy

? 1% overall accuracy (line, load, and temperature)

? Less than 1μA maximum IQ in shutdown mode

? Thermal shutdown and specified min and max

current limit protection

? Available in multiple output voltage versions:

– Fixed outputs of 1.2V to 5V

– Adjustable outputs from 1.2V to 5.5V

– Custom outputs available

2 Applications

? Portable and battery-powered equipment

? Post-regulation for switching supplies

? Noise-sensitive circuitry such as VCOs

? Point of load regulation for DSPs, FPGAs, ASICs,

and microprocessors

3 Description

The TPS732 low-dropout (LDO) voltage regulator

uses an NMOS pass transistor in a voltage-follower

configuration. This topology is stable using output

capacitors with low equivalent series resistance

(ESR), and even allows operation without a capacitor.

The device also provides high reverse blockage (low

reverse current) and ground pin current that is nearly

constant over all values of output current.

The TPS732 uses an advanced BiCMOS process

to yield high precision while delivering very low

dropout voltages and low ground pin current. Current

consumption, when not enabled, is less than 1μA and

designed for portable applications. The extremely low

output noise (30μVRMS with 0.1μF CNR) is designed

for powering VCOs. This device is protected by

thermal shutdown and foldback current limit.