TC35670FTG-006中文資料東芝數(shù)據(jù)手冊PDF規(guī)格書

1. General Description

1.1. Product Concept

TC35670FTG-006(Later omitted TC35670FTG.) is compliant with 2.4 GHz wireless communication Bluetooth?V4.1 Low Energy

standard and has functions of NFC Forum Type 3 Tag (NFC Tag) equipped with FeliCa Contactless IC card Technology. With RF

analog part and Baseband digital part, TC35670FTG provides Bluetooth? HCI (Host Control Interface) functions and Bluetooth Low

Energy GATT profile functions defined in Bluetooth? specifications. Connected with external host processors, TC35670FTG realizes

easy development of Bluetooth? Low Energy applications. Owing to the built-in ADC and GPIO’s, stand-alone low power Bluetooth?

application can also be realized. NFC Tag has a non-volatile memory (EEPROM) and provides a wireless interface which is compliant

with NFC Forum Type 3 Tag standard and a wired interface by I2C. EEPROM is accessed by the wired and wireless interfaces and

includes 1520 bytes general user area. Data can be transferred from the wired interface to the wireless interface or from the wireless

interface to the wired interface through a built-in RAM (Through mode function).

1.2. Features

? Compliant with Bluetooth? Ver4.1 Low Energy

? Built-in Bluetooth? RF analog core and Baseband digital core

? Built-in ARM7TDMI-S? core (Internal CPU clock 13 MHz)

? On-chip Program Mask-ROM (320 KB)

? On-chip Work RAM for Bluetooth? communication process (96 KB),

On-chip RAM for application program storing (32 KB)

? Supports patch program loader function

? Supports sleep, deep sleep mode function.

? NFC Forum Type 3 Tag with wired interface

? Built-in FeliCa Contactless IC Card Technology

? Wireless interface: Automatic detection of transmission speed 212 kbps and 424 kbps

? I2C interface: Maximum operational clock 400 kHz

? Built-in EEPROM: General user area 1520 bytes, Highly reliable program function prevents from programming an

incomplete data, Writing time:5 ms(typ.), 1 bit error automatic correction , CRC automatic addition, and error detection

of read data.

? Security: Mutual authentication with Message authentication code (MAC).

Read only, read and write, read after authentication, write after authentication and data write with MAC are supported.

? General Purpose IO (9 pins)

? SPI interface (1 ch/General Purpose IO),I2C interface (1 ch/General Purpose IO), UART interface (1 ch/General

Purpose IO)

? Host CPU Interface: UART interface (9600 bps to 921.6 kbps /General Purpose IO)

? Built-in general purpose ADC(2 ch for external inputs , 1 ch for internal VDD detection)

? Wake-up Interface (Wake-up input function from sleep and deep sleep /1 ch/General Purpose IO)

? PWM Interface (1 ch/General Purpose IO)

? Base Clock Input

? Built-in oscillator for external resonator connection (26 MHz)

? Sleep Clock Input (External input supported 32.768 kHz)

? Built-in DCDC converter and LDO

? Wide range of input power supply voltage supported

(Supply voltage 1.8 to 3.6 V, Low-voltage detection for batteries,DCDC start more than 2.0 V )

? Package:

? P-VQFN40-0606-0.50-001 [40 pin, 6 x 6 mm2, 0.5 mm pitch, 0.9 mm thickness]