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74LV74

DualD-typeflip-flopwithsetandreset;positive-edgetrigger

DESCRIPTION The74LV74isalow-voltageSi-gateCMOSdeviceandispinandfunctioncompatiblewith74HC/HCT74. FEATURES ?Wideoperatingvoltage:1.0to5.5V ?OptimizedforLowVoltageapplications:1.0to3.6V ?AcceptsTTLinputlevelsbetweenVCC=2.7VandVCC=3.6V ?Ty

PhilipsNXP Semiconductors

飛利浦荷蘭皇家飛利浦

74LV74

DualD-typeflip-flopwithsetandreset;positive-edgetrigger

1.Generaldescription The74LV74isadualpositiveedgetriggeredD-typeflip-flopwithindividualdata(nD),clock(nCP), set(nSD)andreset(nRD)inputs,andcomplementarynQandnQoutputs.DataattheD-inputthat meetstheset-upandholdtimerequirementsontheLOW-to-HIGHclocktrans

NEXPERIANexperia B.V. All rights reserved

安世安世半導(dǎo)體(中國)有限公司

74LV74A

DUALPOSITIVE-EDGE-TRIGGEREDD-TYPEFLIP-FLOPS

TITexas Instruments

德州儀器美國德州儀器公司

74LV74D

DualD-typeflip-flopwithsetandreset;positive-edgetrigger

1.Generaldescription The74LV74isadualpositiveedgetriggeredD-typeflip-flopwithindividualdata(nD),clock(nCP), set(nSD)andreset(nRD)inputs,andcomplementarynQandnQoutputs.DataattheD-inputthat meetstheset-upandholdtimerequirementsontheLOW-to-HIGHclocktrans

NEXPERIANexperia B.V. All rights reserved

安世安世半導(dǎo)體(中國)有限公司

74LV74D

DualD-typeflip-flopwithsetandreset;positive-edgetrigger

DESCRIPTION The74LV74isalow-voltageSi-gateCMOSdeviceandispinandfunctioncompatiblewith74HC/HCT74. FEATURES ?Wideoperatingvoltage:1.0to5.5V ?OptimizedforLowVoltageapplications:1.0to3.6V ?AcceptsTTLinputlevelsbetweenVCC=2.7VandVCC=3.6V ?Ty

PhilipsNXP Semiconductors

飛利浦荷蘭皇家飛利浦

74LV74DB

DualD-typeflip-flopwithsetandreset;positive-edgetrigger

DESCRIPTION The74LV74isalow-voltageSi-gateCMOSdeviceandispinandfunctioncompatiblewith74HC/HCT74. FEATURES ?Wideoperatingvoltage:1.0to5.5V ?OptimizedforLowVoltageapplications:1.0to3.6V ?AcceptsTTLinputlevelsbetweenVCC=2.7VandVCC=3.6V ?Ty

PhilipsNXP Semiconductors

飛利浦荷蘭皇家飛利浦

74LV74N

DualD-typeflip-flopwithsetandreset;positive-edgetrigger

DESCRIPTION The74LV74isalow-voltageSi-gateCMOSdeviceandispinandfunctioncompatiblewith74HC/HCT74. FEATURES ?Wideoperatingvoltage:1.0to5.5V ?OptimizedforLowVoltageapplications:1.0to3.6V ?AcceptsTTLinputlevelsbetweenVCC=2.7VandVCC=3.6V ?Ty

PhilipsNXP Semiconductors

飛利浦荷蘭皇家飛利浦

74LV74PW

DualD-typeflip-flopwithsetandreset;positive-edgetrigger

1.Generaldescription The74LV74isadualpositiveedgetriggeredD-typeflip-flopwithindividualdata(nD),clock(nCP), set(nSD)andreset(nRD)inputs,andcomplementarynQandnQoutputs.DataattheD-inputthat meetstheset-upandholdtimerequirementsontheLOW-to-HIGHclocktrans

NEXPERIANexperia B.V. All rights reserved

安世安世半導(dǎo)體(中國)有限公司

74LV74PW

DualD-typeflip-flopwithsetandreset;positive-edgetrigger

DESCRIPTION The74LV74isalow-voltageSi-gateCMOSdeviceandispinandfunctioncompatiblewith74HC/HCT74. FEATURES ?Wideoperatingvoltage:1.0to5.5V ?OptimizedforLowVoltageapplications:1.0to3.6V ?AcceptsTTLinputlevelsbetweenVCC=2.7VandVCC=3.6V ?Ty

PhilipsNXP Semiconductors

飛利浦荷蘭皇家飛利浦

74LV74PWDH

DualD-typeflip-flopwithsetandreset;positive-edgetrigger

DESCRIPTION The74LV74isalow-voltageSi-gateCMOSdeviceandispinandfunctioncompatiblewith74HC/HCT74. FEATURES ?Wideoperatingvoltage:1.0to5.5V ?OptimizedforLowVoltageapplications:1.0to3.6V ?AcceptsTTLinputlevelsbetweenVCC=2.7VandVCC=3.6V ?Ty

PhilipsNXP Semiconductors

飛利浦荷蘭皇家飛利浦

HD74LV74A

DualD-typeFlipFlopswithPresetandClear

Description TheHD74LV74Ahasindependentdata,preset,clear,andclockinputsQandQoutputsina14pinpackage.TheinputdataistransferredtotheoutputattherisingedgeofclockpulseCLK.Low-voltageandhigh-speedoperationissuitableforthebattery-poweredproducts(e.g.,notebo

HitachiHitachi Semiconductor

日立日立公司

HD74LV74A

DualD-typeFlipFlopswithPresetandClear

Description TheHD74LV74Ahasindependentdata,preset,clear,andclockinputsQandQoutputsina14pinpackage.TheinputdataistransferredtotheoutputattherisingedgeofclockpulseCLK.Low-voltageandhigh-speedoperationissuitableforthebattery-poweredproducts(e.g.,notebook

RENESASRenesas Technology Corp

瑞薩瑞薩科技有限公司

HD74LV74AFPEL

DualD-typeFlipFlopswithPresetandClear

Description TheHD74LV74Ahasindependentdata,preset,clear,andclockinputsQandQoutputsina14pinpackage.TheinputdataistransferredtotheoutputattherisingedgeofclockpulseCLK.Low-voltageandhigh-speedoperationissuitableforthebattery-poweredproducts(e.g.,notebook

RENESASRenesas Technology Corp

瑞薩瑞薩科技有限公司

HD74LV74AFPEL

DualD??ypeFlipFlopswithPresetandClear

RENESASRenesas Technology Corp

瑞薩瑞薩科技有限公司

HD74LV74ARPEL

DualD-typeFlipFlopswithPresetandClear

Description TheHD74LV74Ahasindependentdata,preset,clear,andclockinputsQandQoutputsina14pinpackage.TheinputdataistransferredtotheoutputattherisingedgeofclockpulseCLK.Low-voltageandhigh-speedoperationissuitableforthebattery-poweredproducts(e.g.,notebook

RENESASRenesas Technology Corp

瑞薩瑞薩科技有限公司

HD74LV74ARPEL

DualD??ypeFlipFlopswithPresetandClear

RENESASRenesas Technology Corp

瑞薩瑞薩科技有限公司

HD74LV74ATELL

DualD-typeFlipFlopswithPresetandClear

Description TheHD74LV74Ahasindependentdata,preset,clear,andclockinputsQandQoutputsina14pinpackage.TheinputdataistransferredtotheoutputattherisingedgeofclockpulseCLK.Low-voltageandhigh-speedoperationissuitableforthebattery-poweredproducts(e.g.,notebook

RENESASRenesas Technology Corp

瑞薩瑞薩科技有限公司

HD74LV74ATELL

DualD??ypeFlipFlopswithPresetandClear

RENESASRenesas Technology Corp

瑞薩瑞薩科技有限公司

IN74LV74

DualD-typeflip-flopwithsetandreset;positive-edgetrigger

TheIN74LV74isalow-voltageSi-gateCMOSdeviceandispinandfunctioncompatiblewith74HC/HCT74. ?OutputvoltagelevelsarecompatiblewithinputlevelsofCMOS,NMOSandTTLICS ?Supplyvoltagerange:1.2to3.6V ?Lowinputcurrent:1.0μA;0.1μAatò=25°C ?HighNoiseImmunity

INTEGRAL

Integral Corp.

IN74LV74D

DualD-typeflip-flopwithsetandreset;positive-edgetrigger

TheIN74LV74isalow-voltageSi-gateCMOSdeviceandispinandfunctioncompatiblewith74HC/HCT74. ?OutputvoltagelevelsarecompatiblewithinputlevelsofCMOS,NMOSandTTLICS ?Supplyvoltagerange:1.2to3.6V ?Lowinputcurrent:1.0μA;0.1μAatò=25°C ?HighNoiseImmunity

INTEGRAL

Integral Corp.

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更多TBSN74LV74ADR供應(yīng)商 更新時(shí)間2025-1-18 9:02:00