TA201分立半導(dǎo)體產(chǎn)品的晶閘管-SCR-模塊規(guī)格書PDF中文資料

Application Information

The TXMC637 is a standard single-width Switched

Mezzanine Card (XMC) compatible module providing

a user configurable FPGA (AMD Artix? 7).

32 ADC input channels, based on four ADAS3022,

can be software configured in groups to operate in

single-ended or differential mode. Each of the 32

channels has a resolution of 16bit and can work with

up to 1 MSPS. The programmable gain amplifier is

software configurable and allows a full-scale input

voltage range of up to +/-10.24V.

The TXMC637 DAC output channels are based on

the Dual 16bit AD5547 DAC. Each DAC output is

designed as a configurable single-ended bipolar

analog output. Output voltage is configurable as

±10.0V, ±5.0V or ±2.5V.

32 ESD-protected TTL lines provide a flexible digital

interface. All I/O lines are individually programmable

either as input or output. Input I/O lines are tri-stated

and could be used with the on-board pull up or as tristated

output. Each TTL I/O line has a pull resistor

sourced by a common pull source. The pull voltage

level is selectable to be either +3.3V, +5V and

additionally GND.

16 of these ESD-protected TTL lines can be switched

to be either a TTL interface or RS422 interface.

Switching is done via the User FPGA. All 8 RS422

transceivers have individual internal switchable

terminations.

The User FPGA is connected to a 512 Mbytes, 16 bit

wide DDR3L SDRAM. (to be used with the AMD

Memory Interface Generator)

For customer specific I/O extension or inter-board

communication, the TXMC637 provides 64 FPGA

I/Os on P14 (directly connected). All P14 I/O lines can

be configured in accordance with 7-Series SelectI/O

features e.g. as 64 single ended LVCMOS25 or as 32

differential LVDS25 interface

The User FPGA is configured by a serial quad SPI

flash. For full PCIe specification compliance, the AMD

Tandem Configuration Feature can be required for

FPGA configuration. AMD Tandem Methodologies

“Tandem PROM” should be the favored Methodology.

The SPI flash device is in-system programmable. An

in-circuit debugging option is available via a JTAG

header for (real-time) debugging of the FPGA design.

User applications for the TXMC637 with Artix? 7

FPGA can be developed using the AMD Vivado ?

design tool.