SY100H841ZCTR中文資料麥瑞半導體數(shù)據(jù)手冊PDF規(guī)格書

DESCRIPTION

The SY10/100H841 are single supply, low skew translating 1:4 clock drivers.

The devices feature a 24mA TTL output stage, with AC performance specified into a 50pF load capacitance.

FEATURES

■ Translates positive ECL to TTL (PECL-to-TTL)

■ 300ps pin-to-pin skew

■ 500ps part-to-part skew

■ Differential internal design for increased noise

immunity and stable threshold inputs

■ VBB reference output

■ Single supply

■ Enable input

■ Latch enable input

■ Extra TTL and ECL power/ground pins to reduce

cross-talk/noise

■ High drive capability: 24mA each output

■ Fully compatible with industry standard 10K, 100K

I/O levels

■ Available in 16-pin SOIC package