ST7FLITE20F2B6集成電路（IC）的微控制器規(guī)格書PDF中文資料

ST7FLITE20F2B6屬于集成電路（IC）的微控制器。由意法半導(dǎo)體集團(tuán)制造生產(chǎn)的ST7FLITE20F2B6微控制器微控制器產(chǎn)品是相對(duì)復(fù)雜的用戶可編程數(shù)字邏輯器件。這些產(chǎn)品與視為微控制器的器件密切相關(guān)，兩者之間的區(qū)別主要體現(xiàn)在制造商選擇的用詞。不過按照傳統(tǒng)，微控制器集成了工作存儲(chǔ)器，也更可能包含混合信號(hào)外設(shè)，并且往往與更簡單的軟件范例結(jié)合使用，旨在重復(fù)執(zhí)行一系列預(yù)定義的任務(wù)。

Description

ST7LITE20F2, ST7LITE25F2 and ST7LITE29F2 are referred to as ST7LITE2. The ST7LITE2 is a member of the ST7 microcontroller family. All ST7 devices are based on a common industry-standard 8-bit core, featuring an enhanced instruction set.

The ST7LITE2 features FLASH memory with byte-by-byte In-Circuit Programming (ICP) and In-Application Programming (IAP) capability.

Features

■ Memories

– 8 Kbytes single voltage Flash Program memory with Read-out protection

– In-circuit programming and in-application programming (ICP and IAP)

– 10K write/erase cycles guaranteed

– Data retention: 20 years at 55 °C

– Temperature range: -40°C to 105°C

– 384 bytes RAM.

■ Clock, reset and supply management

– Enhanced reset system

– Enhanced low voltage supervisor (LVD) for main supply and an auxiliary voltage detector (AVD) with interrupt capability for implementing safe power-down procedures

– Clock sources: internal 1 RC oscillator, crystal/ceramic resonator or external clock

– Internal 32-MHz input clock for auto-reload timer

– Optional x4 or x8 PLL for 4 or 8 MHz internal clock

– Five power saving modes: Halt, Active-halt, Wait and Slow, Auto-wakeup from Halt.

■ I/O ports

– Up to 15 multifunctional bidirectional I/O lines

– 7 high sink outputs.

■ 4 timers

– Configurable watchdog timer

– Two 8-bit Lite timers with prescaler

– 1 real-time base and 1 input capture

– One 12-bit auto-reload timer with 4 PWM outputs, input capture and output compare functions.

■ 1 communication interface

– SPI synchronous serial interface.

■ Interrupt management

– 10 interrupt vectors plus TRAP and RESET

– 15 external interrupt lines (on 4 vectors).

■ A/D converter

– 7 input channels

– Fixed gain op-amp

– 13-bit resolution for 0 to 430 mV (@ 5 V VDD)

– 10-bit resolution for 430 mV to 5 V (@ 5 V VDD).

■ Instruction set

– 8-bit data manipulation

– 63 basic instructions with illegal opcode detection

– 17 main addressing modes

– 8 x 8 unsigned multiply instructions.

■ Development tools

– Full hardware/software development package

– DM (debug module)