ST72F344S4T6集成電路（IC）的微控制器規(guī)格書PDF中文資料

ST72F344S4T6屬于集成電路（IC）的微控制器。由意法半導(dǎo)體集團(tuán)制造生產(chǎn)的ST72F344S4T6微控制器微控制器產(chǎn)品是相對復(fù)雜的用戶可編程數(shù)字邏輯器件。這些產(chǎn)品與視為微控制器的器件密切相關(guān)，兩者之間的區(qū)別主要體現(xiàn)在制造商選擇的用詞。不過按照傳統(tǒng)，微控制器集成了工作存儲器，也更可能包含混合信號外設(shè)，并且往往與更簡單的軟件范例結(jié)合使用，旨在重復(fù)執(zhí)行一系列預(yù)定義的任務(wù)。

INTRODUCTION

The ST7234x devices are members of the ST7 microcontroller family. All devices are based on a common industry-standard 8-bit core, featuring an enhanced instruction set.

They feature single-voltage FLASH memory with byte-by-byte In-Circuit Programming (ICP) and In Application Programming (IAP) capabilities.

■ Memories

– up to 16 Kbytes Program memory: Single voltage extended Flash (XFlash) with read-out and write protection, In-Circuit and In-Application Programming (ICP and IAP). 10K write/ erase cycles guaranteed, data retention: 20 years at 55°C.

– up to 1 Kbyte RAM

– 256 bytes data EEPROM with read-out protection. 300K write/erase cycles guaranteed, data retention: 20 years at 55°C.

■ Clock, Reset and Supply Management

– Power On / Power Off safe reset with 3 programmable threshold levels (LVD)

– Auxiliary Voltage Detector (AVD)

– Clock sources: crystal/ceramic resonator oscillators, high-accuracy internal RC oscillator or external clock

– PLL for 4x or 8x frequency multiplication

– 5 Power Saving Modes: Slow, Wait, Halt, Auto-Wakeup from Halt and Active Halt

– Clock output capability (fCPU)

■ Interrupt Management

– Nested interrupt controller

– 10 interrupt vectors plus TRAP and RESET

– 9 external interrupt lines on 4 vectors

■ Up to 34 I/O Ports

– up to 34 multifunctional bidirectional I/O lines

– up to 12 high sink outputs (10 on 32-pin devices)

■ 4 Timers

– Configurable window watchdog timer

– Realtime base

– 16-bit timer A with: 1 input capture, 1 output compares, external clock input, PWM and Pulse generator modes

– 16-bit timer B with: 2 input captures, 2 output compares, PWM and Pulse generator modes

■ 3 Communication Interfaces

– I2C Multi Master / Slave

– I2C Slave 3 Addresses No Stretch with DMA access and Byte Pair Coherency on I2C Read

– SCI asynchronous serial interface (LIN compatible)

– SPI synchronous serial interface

■ 1 Analog peripheral

– 10-bit ADC with 12 input channels (8 on 32- pin devices)

■ Instruction Set

– 8-bit data manipulation

– 63 basic instructions with illegal opcode detection

– 17 main addressing modes

– 8 x 8 unsigned multiply instruction

■ Development tools

– Full hardware/software development package

– On-Chip Debug Module