首頁 >SSTUG32868>規(guī)格書列表
零件編號 | 下載&訂購 | 功能描述 | 制造商&上傳企業(yè) | LOGO |
---|---|---|---|---|
SSTUG32868 | 1.8 V 28-bit 1 : 2 configurable registered buffer with parity for DDR2-1G RDIMM applications | nxpNXP Semiconductors 恩智浦恩智浦半導(dǎo)體公司 | nxp | |
1.8 V 28-bit 1 : 2 configurable registered buffer with parity for DDR2-1G RDIMM applications | nxpNXP Semiconductors 恩智浦恩智浦半導(dǎo)體公司 | nxp | ||
1.8 V 28-bit 1 : 2 configurable registered buffer with parity for DDR2-1G RDIMM applications | nxpNXP Semiconductors 恩智浦恩智浦半導(dǎo)體公司 | nxp | ||
1.8 V 28-bit 1 : 2 configurable registered buffer with parity for DDR2-1G RDIMM applications | nxpNXP Semiconductors 恩智浦恩智浦半導(dǎo)體公司 | nxp | ||
包裝:托盤 封裝/外殼:176-TFBGA 類別:集成電路(IC) 專用邏輯器件 描述:IC BUFFER 1.8V 25BIT 176-LFBGA | NXP USA Inc. NXP USA Inc. | NXP USA Inc. | ||
包裝:托盤 封裝/外殼:176-TFBGA 類別:集成電路(IC) 專用邏輯器件 描述:IC BUFFER 1.8V 25BIT 176-LFBGA | NXP USA Inc. NXP USA Inc. | NXP USA Inc. | ||
28-BITCONFIGURABLEREGISTEREDBUFFERFORDDR2CONFIDENTIAL Features ?28-bit1:2registeredbufferwithparitycheckfunctionality ?SupportsSSTL_18JEDECspecificationondatainputs andoutputs ?SupportsLVCMOSswitchinglevelsonCSGENand RESETinputs ?Lowvoltageoperation:VDD=1.7Vto1.9V ?Availablein176-ballLFBGApackage | RENESASRenesas Technology Corp 瑞薩瑞薩科技有限公司 | RENESAS | ||
28-BITCONFIGURABLEREGISTEREDBUFFERFORDDR2 Description This28-bit1:2configurableregisteredbufferisdesignedfor1.7Vto1.9VVDDoperation.AllinputsarecompatiblewiththeJEDECstandardforSSTL_18,exceptthechip-selectgate-enable(CSGEN),control(C),andreset(RESET)inputs,whichareLVCMOS.Alloutputsareedge-controlle | IDT Integrated Device Technology, Inc. | IDT | ||
28-BITCONFIGURABLEREGISTEREDBUFFERFORDDR2 Description This28-bit1:2configurableregisteredbufferisdesignedfor1.7Vto1.9VVDDoperation.AllinputsarecompatiblewiththeJEDECstandardforSSTL_18,exceptthechip-selectgate-enable(CSGEN),control(C),andreset(RESET)inputs,whichareLVCMOS.Alloutputsareedge-controlle | IDT Integrated Device Technology, Inc. | IDT | ||
28-BITCONFIGURABLEREGISTEREDBUFFERFORDDR2CONFIDENTIAL Features ?28-bit1:2registeredbufferwithparitycheckfunctionality ?SupportsSSTL_18JEDECspecificationondatainputs andoutputs ?SupportsLVCMOSswitchinglevelsonCSGENand RESETinputs ?Lowvoltageoperation:VDD=1.7Vto1.9V ?Availablein176-ballLFBGApackage | RENESASRenesas Technology Corp 瑞薩瑞薩科技有限公司 | RENESAS | ||
28-BITCONFIGURABLEREGISTEREDBUFFERFORDDR2 Features ?28-bit1:2registeredbufferwithparitycheckfunctionality ?SupportsSSTL_18JEDECspecificationondatainputs andoutputs ?SupportsLVCMOSswitchinglevelsonCSGENand RESETinputs ?Lowvoltageoperation:VDD=1.7Vto1.9V ?Availablein176-ballLFBGApackage | RENESASRenesas Technology Corp 瑞薩瑞薩科技有限公司 | RENESAS | ||
28-BITCONFIGURABLEREGISTEREDBUFFERFORDDR2 Description This28-bit1:2configurableregisteredbufferisdesignedfor1.7Vto1.9VVDDoperation.AllinputsarecompatiblewiththeJEDECstandardforSSTL_18,exceptthechip-selectgate-enable(CSGEN),control(C),andreset(RESET)inputs,whichareLVCMOS.Alloutputsareedge-controlle | IDT Integrated Device Technology, Inc. | IDT | ||
28-BITCONFIGURABLEREGISTEREDBUFFERFORDDR2 Description This28-bit1:2configurableregisteredbufferisdesignedfor1.7Vto1.9VVDDoperation.AllinputsarecompatiblewiththeJEDECstandardforSSTL_18,exceptthechip-selectgate-enable(CSGEN),control(C),andreset(RESET)inputs,whichareLVCMOS.Alloutputsareedge-controlle | IDT Integrated Device Technology, Inc. | IDT | ||
28-BITCONFIGURABLEREGISTEREDBUFFERFORDDR2 Features ?28-bit1:2registeredbufferwithparitycheckfunctionality ?SupportsSSTL_18JEDECspecificationondatainputs andoutputs ?SupportsLVCMOSswitchinglevelsonCSGENand RESETinputs ?Lowvoltageoperation:VDD=1.7Vto1.9V ?Availablein176-ballLFBGApackage | RENESASRenesas Technology Corp 瑞薩瑞薩科技有限公司 | RENESAS | ||
28-BITCONFIGURABLEREGISTEREDBUFFERFORDDR2 Description This28-bit1:2configurableregisteredbufferisdesignedfor1.7Vto1.9VVDDoperation.AllinputsarecompatiblewiththeJEDECstandardforSSTL_18,exceptthechip-selectgate-enable(CSGEN),control(C),andreset(RESET)inputs,whichareLVCMOS.Alloutputsareedge-controlle | IDT Integrated Device Technology, Inc. | IDT | ||
28-BITCONFIGURABLEREGISTEREDBUFFERFORDDR2 Description This28-bit1:2configurableregisteredbufferisdesignedfor1.7Vto1.9VVDDoperation.AllinputsarecompatiblewiththeJEDECstandardforSSTL_18,exceptthechip-selectgate-enable(CSGEN),control(C),andreset(RESET)inputs,whichareLVCMOS.Alloutputsareedge-controlle | IDT Integrated Device Technology, Inc. | IDT | ||
1.8V28-bit1:2configurableregisteredbufferwithparityforDDR2-800RDIMMapplications | nxpNXP Semiconductors 恩智浦恩智浦半導(dǎo)體公司 | nxp | ||
1.8V28-bit1:2configurableregisteredbufferwithparityforDDR2-800RDIMMapplications | nxpNXP Semiconductors 恩智浦恩智浦半導(dǎo)體公司 | nxp | ||
1.8V28-bit1:2configurableregisteredbufferwithparityforDDR2-800RDIMMapplications | nxpNXP Semiconductors 恩智浦恩智浦半導(dǎo)體公司 | nxp | ||
1.8V28-bit1:2configurableregisteredbufferwithparityforDDR2-800RDIMMapplications | nxpNXP Semiconductors 恩智浦恩智浦半導(dǎo)體公司 | nxp |
詳細(xì)參數(shù)
- 型號:
SSTUG32868
- 制造商:
PHILIPS
- 制造商全稱:
NXP Semiconductors
- 功能描述:
1.8 V 28-bit 1
供應(yīng)商 | 型號 | 品牌 | 批號 | 封裝 | 庫存 | 備注 | 價格 |
---|---|---|---|---|---|---|---|
NXP USA Inc. |
24+ |
176-TFBGA(6x15) |
56200 |
一級代理/放心采購 |
詢價 | ||
NXP |
20+ |
BGA-176 |
1001 |
就找我吧!--邀您體驗愉快問購元件! |
詢價 | ||
恩智浦 |
22+ |
NA |
500000 |
萬三科技,秉承原裝,購芯無憂 |
詢價 | ||
NXP |
22+ |
NA |
45000 |
加我QQ或微信咨詢更多詳細(xì)信息, |
詢價 | ||
NXP/恩智浦 |
21+ |
BGA |
10000 |
原裝現(xiàn)貨假一罰十 |
詢價 | ||
NXP |
22+ |
176TFBGA (6x15) |
9000 |
原廠渠道,現(xiàn)貨配單 |
詢價 | ||
NXP |
23+ |
176TFBGA (6x15) |
8000 |
只做原裝現(xiàn)貨 |
詢價 | ||
NXP USA Inc. |
24+ |
176-TFBGA |
9350 |
獨立分銷商 公司只做原裝 誠心經(jīng)營 免費試樣正品保證 |
詢價 | ||
NXP |
22+23+ |
BGA |
48605 |
絕對原裝正品現(xiàn)貨,全新深圳原裝進(jìn)口現(xiàn)貨 |
詢價 | ||
NXP |
21+ |
BGA |
570 |
原裝現(xiàn)貨假一賠十 |
詢價 |
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