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SN74LV8T594-Q1_V02中文資料德州儀器數(shù)據(jù)手冊(cè)PDF規(guī)格書

SN74LV8T594-Q1_V02
廠商型號(hào)

SN74LV8T594-Q1_V02

功能描述

SN74LV8T594-Q1 Automotive Octal Shift Register with Output Registers

文件大小

1.94788 Mbytes

頁(yè)面數(shù)量

31 頁(yè)

生產(chǎn)廠商 Texas Instruments
企業(yè)簡(jiǎn)稱

TI1德州儀器

中文名稱

德州儀器官網(wǎng)

原廠標(biāo)識(shí)
數(shù)據(jù)手冊(cè)

下載地址一下載地址二到原廠下載

更新時(shí)間

2025-1-8 8:30:00

SN74LV8T594-Q1_V02規(guī)格書詳情

1 Features

? AEC-Q100 qualified for automotive applications:

– Device temperature grade 1: -40°C to +125°C

– Device HBM ESD classification level 2

– Device CDM ESD classification level C4B

? Latching logic with known power-up state provides

consistent start-up behavior

? Wide operating range of 1.65V to 5.5V

? 5.5V tolerant input pins

? Single-supply voltage translator (refer to LVxT

Enhanced Input Voltage):

– Up translation:

? 1.2V to 1.8V

? 1.5V to 2.5V

? 1.8V to 3.3V

? 3.3V to 5.0V

– Down translation:

? 5.0V, 3.3V, 2.5V to 1.8V

? 5.0V, 3.3V to 2.5V

? 5.0V to 3.3V

? Up to 150Mbps with 5V or 3.3V VCC

? Supports standard function pinout

? Latch-up performance exceeds 250mA

per JESD 17

2 Applications

? Digital signage

? Controlling an indicator LED

? Increase the number of outputs on a

microcontroller

3 Description

The SN74LV8T594-Q1 device contains an 8-bit,

serial-in, parallel-out shift register. Each parallel

output of the shift register is fed through a storage

register before reaching the primary device outputs

(QA through QH). Separate clocks (SRCLK and

RCLK) and direct overriding clear (SRCLR and

RCLR) inputs are provided for both the shift and

storage registers, allowing for loading data separately

from sending it to the outputs. Additionally, the last

output of the internal shift register is sent directly

to the output QH' providing a method to daisy-chain

multiple shift registers.

The input is designed with a reduced threshold circuit

to support up translation when the supply voltage

is larger than the input voltage. Additionally, the 5V

tolerant input pins enable down translation when the

input voltage is larger than the supply voltage. The

output level is always referenced to the supply voltage

(VCC) and supports 1.8V, 2.5V, 3.3V, and 5V CMOS

levels.

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