SN74ALS573CDWR集成電路（IC）的鎖存器規(guī)格書PDF中文資料

SN74ALS573CDWR屬于集成電路（IC）的鎖存器。由德州儀器制造生產(chǎn)的SN74ALS573CDWR鎖存器鎖存器是類似于觸發(fā)器的基本數(shù)字存儲(chǔ)設(shè)備，但是不同之處在于，在鎖存使能（或類似命名）信號(hào)處于有效邏輯狀態(tài)的任何時(shí)間，保持的邏輯狀態(tài)都可以改變?！巴该鳌辨i存器還允許設(shè)備輸出在鎖存使能信號(hào)有效時(shí)反映輸入的當(dāng)前狀態(tài)，而相反的是，狀態(tài)僅在保持狀態(tài)已固定時(shí)改變。

3-State Buffer-Type Outputs Drive Bus

Lines Directly

? Bus-Structured Pinout

? True Logic Outputs

? Package Options Include Plastic

Small-Outline (DW) Packages, Ceramic

Chip Carriers (FK), Standard Plastic (N) and

Ceramic (J) 300-mil DIPs, and Ceramic Flat

(W) Packages

description

These octal D-type transparent latches feature

3-state outputs designed specifically for driving

highly capacitive or relatively low-impedance

loads. They are particularly suitable for

implementing buffer registers, I/O ports,

bidirectional bus drivers, and working registers.

While the latch-enable (LE) input is high, outputs

(Q) respond to the data (D) inputs. When LE is low,

the outputs are latched to retain the data that was

set up.

A buffered output-enable (OE) input can be used

to place the eight outputs in either a normal logic

state (high or low) or a high-impedance state. In

the high-impedance state, the outputs neither load

nor drive the bus lines significantly. The

high-impedance state and the increased drive

provide the capability to drive bus lines without

interface or pullup components.

OE does not affect internal operation of the

latches. Old data can be retained or new data can

be entered while the outputs are in the

high-impedance state.

The SN54ALS573C and SN54AS573A are characterized for operation over the full military temperature range

of ?55°C to 125°C. The SN74ALS573C and SN74AS573A are characterized for operation from 0°C to 70°C.