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SLG46620-A中文資料瑞薩數(shù)據(jù)手冊(cè)PDF規(guī)格書

SLG46620-A
廠商型號(hào)

SLG46620-A

參數(shù)屬性

SLG46620-A 封裝/外殼為20-TSSOP(0.173",4.40mm 寬);包裝為托盤;類別為集成電路(IC) > CPLD(復(fù)雜可編程邏輯器件);產(chǎn)品描述:AUTOMOTIVE GREENPAK MIXED SIGNAL

功能描述

Auto AEC-Q100 Qualified GreenPAK Programmable Mixed-signal Matrix

文件大小

2.8398 Mbytes

頁(yè)面數(shù)量

188 頁(yè)

生產(chǎn)廠商 Renesas Technology Corp
企業(yè)簡(jiǎn)稱

RENESAS瑞薩

中文名稱

瑞薩科技有限公司官網(wǎng)

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數(shù)據(jù)手冊(cè)

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更新時(shí)間

2024-11-17 23:32:00

SLG46620-A規(guī)格書詳情

General Description

The SLG46620-A provides a small, low power component for commonly used mixed-signal functions. The user creates their

circuit design by programming the one time programmable (OTP) Non-Volatile Memory (NVM) to configure the interconnect

logic, the IO Pins and the macrocells of the SLG46620-A. This highly versatile device allows a wide variety of mixed-signal

functions to be designed within a very small, low power single integrated circuit.

Key Features

Applications

General Description

The SLG46620-A provides a small, low power component for commonly used mixed-signal functions. The user creates their

circuit design by programming the one time programmable (OTP) Non-Volatile Memory (NVM) to configure the interconnect

logic, the IO Pins and the macrocells of the SLG46620-A. This highly versatile device allows a wide variety of mixed-signal

functions to be designed within a very small, low power single integrated circuit.

? 8-bit Successive Approximation Register Analog-to-Digital

Converter (SAR ADC)

? ADC 3-bit Programmable Gain Amplifier (PGA)

? Two Digital-to-Analog Converters (DAC)

? Six Analog Comparators (ACMP)

? Two Voltage References (Vref)

? Twenty Five Combinatorial Look Up Tables (LUTs)

? Eight 2-bit LUTs

? Sixteen 3-bit LUTs

? One 4-bit LUT

? One Combination Function Marcocells

? Pattern Generator or 4-bit LUT

? Three Digital Comparators/Pulse Width Modulators

(DCMPs /PWMs) w/ Selectable Deadband

? Ten Counters/Delays (CNT/DLY)

? Two 14-bit Delay/Counter

? One 14-bit Delay/Counter (Wake-Sleep Control)

? One 14-bit Delay/Counter/Finite State Machine

? Five 8-bit Delay/Counter

? One 8-bit Delay/Counter/Finite State Machine

? Twelve D Flip-Flops/Latches

? Two Pipe Delays – 16 stage/ 2 output

? Two Programmable Delays w/ Edge Detection

? Three Internal Oscillators

? Low-Frequency

? Ring

? RC 25 kHz and 2 MHz

? Power-On Reset (POR)

? Two Bandgaps

? Slave SPI

? Read Back Protection (Read Lock)

? Power Supply

? 1.8 V (±5 ) to 3.3 V (±10 )

? Ambient Operating Temperature Range: -40°C to 105°C

? RoHS Compliant / Halogen-Free

? Available Package

? 20-pin TSSOP: 6.5 mm x 6.4 mm x 1.2 mm, 0.65 mm

pitch

? AEC-Q100 (TA = -40°C to 105°C) Qualified

產(chǎn)品屬性

  • 產(chǎn)品編號(hào):

    SLG46620-AG

  • 制造商:

    Dialog Semiconductor GmbH

  • 類別:

    集成電路(IC) > CPLD(復(fù)雜可編程邏輯器件)

  • 包裝:

    托盤

  • 可編程類型:

    OTP

  • 供電電壓 - 內(nèi)部:

    1.71V ~ 3.6V

  • 工作溫度:

    -40°C ~ 105°C(TA)

  • 安裝類型:

    表面貼裝型

  • 封裝/外殼:

    20-TSSOP(0.173",4.40mm 寬)

  • 供應(yīng)商器件封裝:

    20-TSSOP

  • 描述:

    AUTOMOTIVE GREENPAK MIXED SIGNAL

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