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SAA7206H中文資料飛利浦?jǐn)?shù)據(jù)手冊(cè)PDF規(guī)格書(shū)

SAA7206H
廠商型號(hào)

SAA7206H

功能描述

DVB compliant descrambler

文件大小

193.8 Kbytes

頁(yè)面數(shù)量

52 頁(yè)

生產(chǎn)廠商 NXP Semiconductors
企業(yè)簡(jiǎn)稱

Philips飛利浦

中文名稱

荷蘭皇家飛利浦官網(wǎng)

原廠標(biāo)識(shí)
數(shù)據(jù)手冊(cè)

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更新時(shí)間

2024-12-27 22:58:00

SAA7206H規(guī)格書(shū)詳情

GENERAL DESCRIPTION

The SAA7206H (DVB compliant) is designed for use in MPEG-2 based digital TV receivers, incorporating conditional access filters. Such receivers are to be implemented in, for instance, a digital video broadcasting top set box, or an integrated digital TV receiver.

FEATURES

? Input data fully compliant with the Transport Stream (TS) definition of the MPEG-2 systems specification

? Input data signals; [Forward Error Correction (FEC) Interface]

– modem data input bus (8-bit wide)

– valid input data indicator

– erroneous packet indicator

– first packet byte indicator

– byte strobe signal (for asynchronous mode only).

The interface can be programmed to one of two modes:

– Asynchronous mode; byte strobe input signal (MBCLK) < 9 MHz, for connection to a modem (FEC)

– Synchronous mode; MBCLK is not used. Data is delivered to the descrambler synchronized with the chip clock (DCLK) [9 MHz (typ.) with a 33 duty cycle].

? No external memory

? Effective bit rate; fbit ≤ 72 MHz

? Control interface; 8-bit multiplexed data/address, memory mapped I/O (90CE201 microcontroller parallel bus compatible), in combination with a microcontroller interrupt signal (IRQ)

? Output ports are identical to the input data interface (demultiplexer interface)

– except for the packet error indicator (MB/MB), as the descrambler translates an active MB signal to the ‘transport_error_indicator’ bit in the transport stream

– except for the byte strobe input signal (MBCLK), as data is delivered to the demultiplexer, synchronized with the descrambler chip clock which is generated by the demultiplexer

? Descrambler, based on the super descrambler mechanism algorithm with stream decipher and block decipher. The descrambler is initialized with a 64-bit Control Word (CW) at the beginning of a transport stream packet payload of a selected Packet Identification (PID). The descrambler operates on transport stream packet or Packetized Elementary Stream (PES) packet payloads

? Microcontroller support; only for control, no specific descrambling tasks are performed by the microcontroller. However, parsing and processing of conditional access information (such as EMM and ECM data) is left to the system microcontroller

? Boundary scan test port for boundary scan.

產(chǎn)品屬性

  • 型號(hào):

    SAA7206H

  • 制造商:

    PHILIPS

  • 制造商全稱:

    NXP Semiconductors

  • 功能描述:

    DVB compliant descrambler

供應(yīng)商 型號(hào) 品牌 批號(hào) 封裝 庫(kù)存 備注 價(jià)格
NXP
2016+
QFP64
2980
公司只做原裝,假一罰十,可開(kāi)17%增值稅發(fā)票!
詢價(jià)
PHILIPS/飛利浦
23+
NA/
36
優(yōu)勢(shì)代理渠道,原裝正品,可全系列訂貨開(kāi)增值稅票
詢價(jià)
PHILIPS
2138+
QFP
8960
專營(yíng)BGA,QFP原裝現(xiàn)貨,假一賠十
詢價(jià)
PHILIPS/NXP
23+
QFP
3000
全新原裝、誠(chéng)信經(jīng)營(yíng)、公司現(xiàn)貨銷(xiāo)售!
詢價(jià)
PHILIPS
23+24
QFP
29850
原裝正品優(yōu)勢(shì)渠道價(jià)格合理.可開(kāi)13%增值稅發(fā)票
詢價(jià)
PHILIPS/飛利浦
22+
QFP64
9000
原裝正品
詢價(jià)
PHI
24+
QFP64
3629
原裝優(yōu)勢(shì)!房間現(xiàn)貨!歡迎來(lái)電!
詢價(jià)
PHILIPS
23+
QFP
2870
絕對(duì)全新原裝!現(xiàn)貨!特價(jià)!請(qǐng)放心訂購(gòu)!
詢價(jià)
PHI
05+
原廠原裝
5818
只做全新原裝真實(shí)現(xiàn)貨供應(yīng)
詢價(jià)
PHILIPS
16+
QFP
821
進(jìn)口原裝現(xiàn)貨/價(jià)格優(yōu)勢(shì)!
詢價(jià)