QPG6105SR中文資料QORVO數(shù)據(jù)手冊(cè)PDF規(guī)格書

Key Features

Radio

? Operates in the worldwide 2.4 GHz ISM-band

? Integrated baluns and RF filters

? In 1 dB steps, programmable transmitter output

power up to +10 dBm

? Targeting compliance with worldwide RF

regulations: ETSI EN 300 328 (Europe),

FCC CFR47 Part 15 (US), and

ARIB STD-T-66 (Japan)

IEEE 802.15.4 compliant PHY and Real-Time MAC

? Preamble-based ConcurrentConnect Antenna

Diversity

? Packet-in-Packet resynchronization

? ConcurrentConnect Multi-Channel capability,

operating in up to 3 PANs on different channels

Bluetooth v 5.3 compliant Low Energy Controller

? Enhanced Data Rate (2 Mbits/s)

? Link Layer Privacy and Advertising Extensions

? Full connection utilization

Multi-Stack Support

? Multiple IEEE 802.15.4 based stacks MAC API

? Bluetooth Low Energy HCI

Dynamic Multi-Protocol

? Hardware accelerated Dynamic Multi-Protocol

Bluetooth Low Energy and IEEE 802.15.4

communications

? Allows combining Bluetooth Low Energy

Peripheral with any type of Zigbee/Matter-over-

Thread device

ConcurrentConnect Multi-Radio capability

? Concurrent IEEE 802.15.4 and Bluetooth listening

? Allows combining Bluetooth Low Energy

Central/Observer or Mesh Node with

Zigbee/Matter-over-Thread router

Advanced Security Engine

? Hardware accelerated AES and CCM/CCM*

encryption and decryption with 128, 192 and 256-

bit keys

? Hashing engine: SHA-128, SHA-2 (SHA-256,

SHA-512)

? Public Key Crypto: Elliptic Curve; support for

ECDSA, ECDH, P256, Curve25519, J-Pake,

ECMQV, EdDSA, etc.

? Cryptographic Random Number Generator

Built-in Security Features

? Secure boot

? Secure OTA software upgrades

? Secure identity

Integrated Microcontroller

? Arm? Cortex?-M4 processor with DSP

functionality

? Up to 64 MHz clock speed

Memory

? 1 Mbyte Flash Program memory

? Patchable ROM for Flash offload

? 128 Kbyte Low Leakage Retention RAM

? 8-Channel DMA Engine

Peripherals and Interfaces

? Up to 23 Programmable GPIO lines

? Up to 4 Analog input lines

? Full internal IO pull-up / pull-down support during

active and standby states

? Two UART interfaces

? SPI Master and Slave interfaces

? I2C Master and Slave interfaces

? I2S Master/Slave interface for digital audio devices

? PDM Microphone Interface

? PWM Engine (16-bit PWM ) for 8 outputs

? LED Signal Generator (8-bit PWM) with fading

support for 4 signaling LEDs

? IR Signal Generator

? 10/12-bit ADC to monitor the ANIO pins, the

power supply level and the temperature

? Low power comparator

Power Management

? Operating voltage range: 1.8 ... 3.6V

? Integrated Regulators

? Low power standby modes:

Using internal LjRC oscillator: 0.9 μA

Using 32 MHz crystal oscillator: 765 μA

Using 32 KiHz crystal oscillator: 1.6 μA

? Data and state retention in all standby modes

Dimensions and Layout

? QFN32, 4x4 mm package (0.4 mm pitch)

? Supports direct interfacing with printed antennas

? No RF shielding required

Environmental Aspects

? RoHS compliant