General Description

The PL133-97 is an advanced fanout buffer designed

for high performance, low-power, small form factor

applications. The PL133-97 accepts a reference clock

input from DC to 150 MHz and provides nine outputs of

the same frequency.

The PL133-97 is offered in a small 3 mm x 3 mm

QFN-16L package and it offers the best phase noise,

additive jitter performance, and lowest power

consumption of any comparable IC.

The PL133-97 outputs can be disabled to a high

impedance (tri-state) by pulling low the OE pin. When

the OE pin is high, the outputs are enabled and follow

the REF input signal. When the OE pin is left open, a

pull-up resistor on the chip will default the OE pin to

logic 1 so the outputs are enabled.

CLK8 is a free running output that remains enabled

when the OE pin is pulled low.

Features

? 1:9 LVCMOS Output Fanout Buffer from DC

to150 MHz

? Low Additive Phase Jitter of 60 fs RMS

? 8 mA Output Drive Strength

? Low Power Consumption for Portable

Applications

? Low Input-Output Delay

? Output-Output Skew <250 ps

? 2.5V to 3.3V, ±10 Operation

? 1.8V ±5 Operation up to 67 MHz

? Operating Temperature Range:

- Commercial: 0°C to +70°C

- Industrial: –40°C to +85°C

? Available in 16-Pin QFN Package

PL133-97QC屬于集成電路（IC） > 時鐘緩沖器，驅(qū)動器。微芯科技股份有限公司制造生產(chǎn)的PL133-97QC時鐘緩沖器，驅(qū)動器時鐘緩沖器和驅(qū)動器集成電路產(chǎn)品族中的產(chǎn)品用于幫助信號在系統(tǒng)中傳輸，常用作頻率/時間參考信號，以同步系統(tǒng)內(nèi)的活動。盡管這些器件最常用到的功能就是緩沖（即，為使信號不受驅(qū)動負(fù)載的影響而從某個信號源復(fù)制信號），但是該產(chǎn)品族中的某些器件還能執(zhí)行其他功能，例如選擇性改變緩沖信號路徑、按某個整數(shù)值分割信號頻率，或進(jìn)行所用電信號格式轉(zhuǎn)換。