首頁(yè)>PCA9517DP>規(guī)格書(shū)詳情

PCA9517DP集成電路(IC)的信號(hào)緩沖器、中繼器、分離器規(guī)格書(shū)PDF中文資料

PCA9517DP
廠商型號(hào)

PCA9517DP

參數(shù)屬性

PCA9517DP 封裝/外殼為8-TSSOP,8-MSOP(0.118",3.00mm 寬);包裝為卷帶(TR)剪切帶(CT)Digi-Reel? 得捷定制卷帶;類(lèi)別為集成電路(IC)的信號(hào)緩沖器、中繼器、分離器;PCA9517DP應(yīng)用范圍:I2C;產(chǎn)品描述:IC REDRIVER I2C 1CH 8TSSOP

功能描述

Level translating I2C-bus repeater

文件大小

127.66 Kbytes

頁(yè)面數(shù)量

19 頁(yè)

生產(chǎn)廠商 NXP Semiconductors
企業(yè)簡(jiǎn)稱(chēng)

nxp恩智浦

中文名稱(chēng)

恩智浦半導(dǎo)體公司官網(wǎng)

原廠標(biāo)識(shí)
數(shù)據(jù)手冊(cè)

下載地址一下載地址二到原廠下載

更新時(shí)間

2024-12-25 22:50:00

PCA9517DP規(guī)格書(shū)詳情

General description

The PCA9517 is a CMOS integrated circuit that provides level shifting between low voltage (down to 0.9 V) and higher voltage (2.7 V to 5.5 V) I2C-bus or SMBus applications. While retaining all the operating modes and features of the I2C-bus system during the level shifts, it also permits extension of the I2C-bus by providing bidirectional buffering for both the data (SDA) and the clock (SCL) lines, thus enabling two buses of 400 pF. Using the PCA9517 enables the system designer to isolate two halves of a bus for both voltage and capacitance. The SDA and SCL pins are over voltage tolerant and are high-impedance when the PCA9517 is unpowered.

The 2.7 V to 5.5 V bus B-side drivers behave much like the drivers on the PCA9515A device, while the adjustable voltage bus A-side drivers drive more current and eliminate the static offset voltage. This results in a LOW on the B-side translating into a nearly 0 V LOW on the A-side which accommodates smaller voltage swings of lower voltage logic.

The static offset design of the B-side PCA9517 I/O drivers prevent them from being connected to another device that has rise time accelerator including the PCA9510, PCA9511, PCA9512, PCA9513, PCA9514, PCA9515A, PCA9516A, PCA9517 (B-side), or PCA9518. The A-side of two or more PCA9517s can be connected together, however, to allow a star topography with the A-side on the common bus, and the A-side can be connected directly to any other buffer with static or dynamic offset voltage. Multiple PCA9517s can be connected in series, A-side to B-side, with no build-up in offset voltage with only time of flight delays to consider.

The PCA9517 drivers are not enabled unless VCCA is above 0.8 V and VCC is above 2.5 V. The EN pin can also be used to turn the drivers on and off under system control. Caution should be observed to only change the state of the enable pin when the bus is idle.

The output pull-down on the B-side internal buffer LOW is set for approximately 0.5 V, while the input threshold of the internal buffer is set about 70 mV lower (0.43 V). When the B-side I/O is driven LOW internally, the LOW is not recognized as a LOW by the input. This prevents a lock-up condition from occurring. The output pull-down on the A-side drives a hard LOW and the input level is set at 0.3VCCA to accommodate the need for a lower LOW level in systems where the low voltage side supply voltage is as low as 0.9 V.

Features

■ 2 channel, bidirectional buffer isolates capacitance and allows 400 pF on either side of

the device

■ Voltage level translation from 0.9 V to 5.5 V and from 2.7 V to 5.5 V

■ Footprint and functional replacement for PCA9515/15A

■ I2C-bus and SMBus compatible

■ Active HIGH repeater enable input

■ Open-drain input/outputs

■ Lock-up free operation

■ Supports arbitration and clock stretching across the repeater

■ Accommodates Standard mode and Fast mode I2C-bus devices and multiple masters

■ Powered-off high-impedance I2C-bus pins

■ A-side operating supply voltage range of 0.9 V to 5.5 V

■ B-side operating supply voltage range of 2.7 V to 5.5 V

■ 5 V tolerant I2C-bus and enable pins

■ 0 Hz to 400 kHz clock frequency (the maximum system operating frequency may be

less than 400 kHz because of the delays added by the repeater).

■ ESD protection exceeds 2000 V HBM per JESD22-A114, 150 V MM per

JESD22-A115, and 1000 V CDM per JESD22-C101

■ Latch-up testing is done to JEDEC Standard JESD78 which exceeds 100 mA

■ Packages offered: SO8 and TSSOP8

產(chǎn)品屬性

  • 產(chǎn)品編號(hào):

    PCA9517DP,118

  • 制造商:

    NXP USA Inc.

  • 類(lèi)別:

    集成電路(IC) > 信號(hào)緩沖器、中繼器、分離器

  • 包裝:

    卷帶(TR)剪切帶(CT)Digi-Reel? 得捷定制卷帶

  • 類(lèi)型:

    緩沖器,轉(zhuǎn)接驅(qū)動(dòng)器

  • 應(yīng)用:

    I2C

  • 輸入:

    2 線式總線

  • 輸出:

    2 線式總線

  • 數(shù)據(jù)速率(最大值):

    400kHz

  • 通道數(shù):

    2

  • 電壓 - 供電:

    2.7V ~ 5.5V

  • 電流 - 供電:

    5mA

  • 工作溫度:

    -40°C ~ 85°C

  • 安裝類(lèi)型:

    表面貼裝型

  • 封裝/外殼:

    8-TSSOP,8-MSOP(0.118",3.00mm 寬)

  • 供應(yīng)商器件封裝:

    8-TSSOP

  • 描述:

    IC REDRIVER I2C 1CH 8TSSOP

供應(yīng)商 型號(hào) 品牌 批號(hào) 封裝 庫(kù)存 備注 價(jià)格
NXP
23+
MSOP8
20000
全新原裝假一賠十
詢價(jià)
NXP
2020+
MSOP8
8000
只做自己庫(kù)存,全新原裝進(jìn)口正品假一賠百,可開(kāi)13%增
詢價(jià)
NXP/恩智浦
22+
MSOP-8
100000
代理渠道/只做原裝/可含稅
詢價(jià)
NXP/恩智浦
20+
MSOP8
61751
詢價(jià)
NXP/恩智浦
24+
標(biāo)準(zhǔn)
37838
熱賣(mài)原裝進(jìn)口
詢價(jià)
NXP
2019
MSOP8
23100
原裝正品鉆石品質(zhì)假一賠十
詢價(jià)
TI
2022+
TO263-5
6000
一級(jí)代理/分銷(xiāo)渠道價(jià)格優(yōu)勢(shì) 十年芯程一路只做原裝正品
詢價(jià)
NXP
21+20
MSOP8
5000
全新原裝公司現(xiàn)貨
詢價(jià)
NXP
23+
NA
30080
專(zhuān)業(yè)電子元器件供應(yīng)鏈正邁科技特價(jià)代理QQ1304306553
詢價(jià)
NXP(恩智浦)
2023+
-
4550
全新原裝正品
詢價(jià)