PAC5526AQMSR中文資料QORVO數(shù)據(jù)手冊PDF規(guī)格書

3 Key Features

? Power Manager

o Charge Pump DC/DC for high-side gate drive supply

o Input Voltage: 6V – 48V

o Buck-Boost Regulator for low-side gate drive supply

o Configurable 10V or 12V

o 4 Linear regulators with power and hibernate management

o Power and temperature monitor, warning, fault detection

? Proprietary Configurable Analog Front-End

o 6 Analog Front-End IO pins

o 1 Differential Programmable Gain Amplifier

o 5 Single-ended Programmable Gain Amplifiers

o Programmable Over-Current Protection and Current Limit

o 2 10-bit DACs

? Proprietary Application Specific Power Drivers

o 3 high-side gate drivers with programmable gate driving up to 1A

o 3 high-side gate drivers with programmable gate driving up to 1A

o 100 Duty Cycle

o Cycle-by-cycle current limit

o Configurable fault protection

? 3.3V I/Os

? 150MHz Arm? Cortex?-M4F 32-bit Microcontroller Core

o Single-cycle 32-bit x 32-bit hardware multiplier

o 32-bit hardware divider

o DSP Instructions and Saturation Arithmetic Support

o Integrated sleep and deep sleep modes

o Single-precision Floating Point Unit (FPU)

o 8-region Memory Protection Unit (MPU)

o Nested Vectored Interrupt Controller (NVIC) with 32 Interrupts with 8 levels of priority

o 24-Bit SysTick Timer

o Wake-up Interrupt Controller (WIC) allowing power-saving sleep modes

o Clock-gating allowing low-power operation

o Embedded Trace Macrocell (ETM) for in-system debugging at real-time without breakpoints

? Memory

o 128kB FLASH

o 32kB SRAM with ECC

o 2 x 1kB INFO FLASH area for manufacturing information

o 1 x 1kB INFO FLASH area for user parameter storage and application configuration or code

o 4-Level Code Protection

? Analog to Digital Converter (ADC)

o 12-bit, 2.5MSPS SAR ADC

o Programmable Dynamic Triggering and Sampling Engine (DTSE)

? I/O

o 20 general-purpose I/Os with tri-state, pull-up, pull-down and dedicated I/O supply

o 10 I/Os can be configured as ADC input or digital I/O

o Configurable weak pull-up and pull-down

o Configurable drive strength (6mA to 25mA minimum)

o Dedicated Integrated IO power supply (3.3V)

o Flexible peripheral MUX allowing each IO pin to be configured with one of up to 8 peripheral functions

o Flexible Interrupt Controller

? Flexible Clock Control System (CCS)

o 300MHz PLL from internal 1.25 oscillator

o 20MHz Ring Oscillator

o 20MHz External Clock Input

? Timing Generators

o Four 16-bit timers with up to 32 PWM/CC blocks

? 16 Programmable Hardware Dead-time generators

? Up to 300MHz input clock for high-resolution PWM

o 16-bit Windowed Watchdog Timer (WWDT)

o 24-bit Real-time Clock (RTC) with Calendar and Alarm Functions

o 24-bit SysTick Timer

o 2 x 24-bit General-purpose count-down timers with interrupt

o Wake-up timer for sleep modes from 0.125s to 8s

? Communication Peripherals

o 3 x USART

? SPI or UART modes

? SPI Master/Slave, up to 25MHz

? UART, up to 1Mbps

o I2C Master/Slave

o CAN 2.0B Controller

o Single Wire Debugger (SWD), JTAG

o Embedded Trace Macrocell (ETM)

? 4-Level User-Configurable Code Protection

? 96-bit Unique ID

? CRC Engine

o Offloads software for communications and safety protocol through hardware acceleration

o Configurable Polynomial (CRC-16 or CRC-8)

o Configurable Input Data Width, Input and Output Reflection

o Programmable Seed Value

? Physical

? TA = -40°C to 125°C

? QFN 6x6mm 48-pin package

o Exposed pad for thermal management