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P103-02XC中文資料PLL數(shù)據(jù)手冊(cè)PDF規(guī)格書(shū)

P103-02XC
廠商型號(hào)

P103-02XC

功能描述

DDR SDRAM Buffer for Desktop PCs with 4 DDR DIMMS

文件大小

178.86 Kbytes

頁(yè)面數(shù)量

6 頁(yè)

生產(chǎn)廠商 PhaseLink Corporation
企業(yè)簡(jiǎn)稱(chēng)

PLL

中文名稱(chēng)

PhaseLink Corporation官網(wǎng)

原廠標(biāo)識(shí)
數(shù)據(jù)手冊(cè)

下載地址一下載地址二

更新時(shí)間

2024-12-27 22:59:00

P103-02XC規(guī)格書(shū)詳情

DESCRIPTIONS

The PLL103-02 Rev.D is designed as a 2.5V buffer to distribute high-speed clocks in PC applications. The device has 24 outputs. These outputs can be configured to support four unbuffered DDR DIMMS. The PLL103-02 Rev.D can be used in conjunction with the PLL202-04 or similar clock synthesizer for the VIA Pro 266 chipset. The PLL103-02 Rev.D also has an I2C interface, which can enable or disable each output clock. When power up, all output clocks are enabled (has internal pull up).

FEATURES

? Generates 24 output buffer from one input.

? Supports up to four DDR DIMMS.

? Supports 266MHz DDR SDRAM.

? One additional output for feedback.

? Less than 5ns delay.

? Skew between any outputs is less than 100 ps.

? 2.5V Supply range.

? Enhanced DDR Output Drive selected by I2C.

? Available in 48 pin SSOP.

產(chǎn)品屬性

  • 型號(hào):

    P103-02XC

  • 制造商:

    PLL

  • 制造商全稱(chēng):

    PLL

  • 功能描述:

    DDR SDRAM Buffer for Desktop PCs with 4 DDR DIMMS

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