P102-05SC中文資料PLL數(shù)據(jù)手冊PDF規(guī)格書
P102-05SC規(guī)格書詳情
DESCRIPTION
The PLL102-05 is a high performance, low skew, low jitter zero delay buffer designed to distribute high speed clocks and is available in 8-pin SOIC package. It has four outputs that are synchronized with the input. The synchronization is established via CLKOUT feed back to the input of the PLL. Since the skew between the input and output is less than ±350 ps, the device acts as a zero delay buffer.
FEATURES
? Frequency range 25 ~ 60MHz.
? Internal phase locked loop will allow spread spectrum modulation on reference clock to pass to the outputs (up to 100kHz SST modulation).
? Zero input - output delay.
? Less than 700 ps device - device skew.
? Less than 250 ps skew between outputs.
? Less than 150 ps cycle - cycle jitter.
? Output Enable function tri-state outputs.
? 3.3V operation.
? Available in 8-Pin 150mil SOIC.
產(chǎn)品屬性
- 型號：
P102-05SC
- 制造商：
PLL
- 制造商全稱：
PLL
- 功能描述：
Low Skew Output Buffer
| 供應(yīng)商 | 型號 | 品牌 | 批號 | 封裝 | 庫存 | 備注 | 價格 |
|---|---|---|---|---|---|---|---|
FREESCALE/飛思卡爾 |
24+ |
NA/ |
138 |
優(yōu)勢代理渠道,原裝正品,可全系列訂貨開增值稅票 |
詢價 | ||
NXP/恩智浦 |
24+ |
TEPBGA-689 |
6982 |
全新原廠原裝，進口正品現(xiàn)貨，正規(guī)渠道可含稅??！ |
詢價 | ||
FREESCAL |
2016+ |
BGA |
6528 |
只做進口原裝現(xiàn)貨!或者訂貨,假一賠十! |
詢價 | ||
FREESCALE |
12+ |
BGA689 |
138 |
一級代理,專注軍工、汽車、醫(yī)療、工業(yè)、新能源、電力 |
詢價 | ||
尼克森NIKOS |
19+ |
() |
880000 |
明嘉萊只做原裝正品現(xiàn)貨 |
詢價 | ||
ST |
23+ |
TO-92 |
16900 |
正規(guī)渠道,只有原裝! |
詢價 | ||
NXP US |
21+ |
25000 |
原廠原包 深圳現(xiàn)貨 主打品牌 假一賠百 可開票! |
詢價 | |||
FREESCAL |
BGA |
321 |
正品原裝--自家現(xiàn)貨-實單可談 |
詢價 | |||
NXP |
22+ |
689TEPBGA II (31x31) |
9000 |
原廠渠道,現(xiàn)貨配單 |
詢價 | ||
NIKO/尼克森微 |
24+ |
TO-252 |
786000 |
全新原裝假一罰十 |
詢價 |
