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N74F113N

Dual J-K negative edge-triggered flip-flops without reset

DESCRIPTION The74F113,dualnegativeedge-triggeredJK-typeflip-flop,featuresindividualJ,K,clock(CP),set(SD)inputs,trueandcomplementaryoutputs.TheasynchronousSDinput,whenlow,forcestheoutputstothesteadystatelevelsasshowninthefunctiontableregardlessofthelevel

PhilipsNXP Semiconductors

飛利浦荷蘭皇家飛利浦

74F113

DualJ-Knegativeedge-triggeredflip-flopswithoutreset

DESCRIPTION The74F113,dualnegativeedge-triggeredJK-typeflip-flop,featuresindividualJ,K,clock(CP),set(SD)inputs,trueandcomplementaryoutputs.TheasynchronousSDinput,whenlow,forcestheoutputstothesteadystatelevelsasshowninthefunctiontableregardlessofthelevel

PhilipsNXP Semiconductors

飛利浦荷蘭皇家飛利浦

74F113

DualJKNegativeEdge-TriggeredFlip-Flop

GeneralDescription The74F113offersindividualJ,K,SetandClockinputs.WhentheclockgoesHIGHtheinputsareenabledanddatamaybeentered. ThelogicleveloftheJandKinputsmaybechangedwhentheclockpulseisHIGHandtheflipflopwillperformaccordingtotheTruthTableaslo

FairchildFairchild Semiconductor

仙童半導(dǎo)體飛兆/仙童半導(dǎo)體公司

74F113PC

DualJKNegativeEdge-TriggeredFlip-Flop

GeneralDescription The74F113offersindividualJ,K,SetandClockinputs.WhentheclockgoesHIGHtheinputsareenabledanddatamaybeentered. ThelogicleveloftheJandKinputsmaybechangedwhentheclockpulseisHIGHandtheflipflopwillperformaccordingtotheTruthTableaslo

FairchildFairchild Semiconductor

仙童半導(dǎo)體飛兆/仙童半導(dǎo)體公司

74F113SC

DualJKNegativeEdge-TriggeredFlip-Flop

GeneralDescription The74F113offersindividualJ,K,SetandClockinputs.WhentheclockgoesHIGHtheinputsareenabledanddatamaybeentered. ThelogicleveloftheJandKinputsmaybechangedwhentheclockpulseisHIGHandtheflipflopwillperformaccordingtotheTruthTableaslo

FairchildFairchild Semiconductor

仙童半導(dǎo)體飛兆/仙童半導(dǎo)體公司

74F113SJ

DualJKNegativeEdge-TriggeredFlip-Flop

GeneralDescription The74F113offersindividualJ,K,SetandClockinputs.WhentheclockgoesHIGHtheinputsareenabledanddatamaybeentered. ThelogicleveloftheJandKinputsmaybechangedwhentheclockpulseisHIGHandtheflipflopwillperformaccordingtotheTruthTableaslo

FairchildFairchild Semiconductor

仙童半導(dǎo)體飛兆/仙童半導(dǎo)體公司

I74F113D

DualJ-Knegativeedge-triggeredflip-flopswithoutreset

DESCRIPTION The74F113,dualnegativeedge-triggeredJK-typeflip-flop,featuresindividualJ,K,clock(CP),set(SD)inputs,trueandcomplementaryoutputs.TheasynchronousSDinput,whenlow,forcestheoutputstothesteadystatelevelsasshowninthefunctiontableregardlessofthelevel

PhilipsNXP Semiconductors

飛利浦荷蘭皇家飛利浦

I74F113N

DualJ-Knegativeedge-triggeredflip-flopswithoutreset

DESCRIPTION The74F113,dualnegativeedge-triggeredJK-typeflip-flop,featuresindividualJ,K,clock(CP),set(SD)inputs,trueandcomplementaryoutputs.TheasynchronousSDinput,whenlow,forcestheoutputstothesteadystatelevelsasshowninthefunctiontableregardlessofthelevel

PhilipsNXP Semiconductors

飛利浦荷蘭皇家飛利浦

N74F113D

DualJ-Knegativeedge-triggeredflip-flopswithoutreset

DESCRIPTION The74F113,dualnegativeedge-triggeredJK-typeflip-flop,featuresindividualJ,K,clock(CP),set(SD)inputs,trueandcomplementaryoutputs.TheasynchronousSDinput,whenlow,forcestheoutputstothesteadystatelevelsasshowninthefunctiontableregardlessofthelevel

PhilipsNXP Semiconductors

飛利浦荷蘭皇家飛利浦

詳細(xì)參數(shù)

  • 型號(hào)：

    N74F113N

  • 功能描述：

    觸發(fā)器 DUAL J-K NEG EDGE F/F

  • RoHS：

    否

  • 制造商：

    Texas Instruments

  • 電路數(shù)量：

    2

  • 邏輯系列：

    SN74

  • 邏輯類型：

    D-Type Flip-Flop

  • 極性：

    Inverting, Non-Inverting

  • 輸入類型：

    CMOS

  • 傳播延遲時(shí)間：

    4.4 ns

  • 高電平輸出電流：

    - 16 mA

  • 低電平輸出電流：

    16 mA

  • 電源電壓-最大：

    5.5 V

  • 最大工作溫度：

    + 85 C

  • 安裝風(fēng)格：

    SMD/SMT

  • 封裝/箱體：

    X2SON-8

  • 封裝：

    Reel

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PHILIPS
24+
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5082
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PHILIPS
新
950
全新原裝 貨期兩周
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PHI
6000
面議
19
DIP/SMD
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PHILIPS/飛利浦
1535+
1374
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PHILIPS/飛利浦
23+
1374
全新原裝，歡迎來(lái)電咨詢
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PHIL
1994
2785
原裝正品現(xiàn)貨庫(kù)存價(jià)優(yōu)
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PHILIPS
25+
SOP
2500
強(qiáng)調(diào)現(xiàn)貨,隨時(shí)查詢!
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Signetics
24+
SOP-3.9
4897
絕對(duì)原裝!現(xiàn)貨熱賣!
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24+
3000
公司存貨
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PHILIPS
23+
SOP-14
1185
全新原裝
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更多N74F113N供應(yīng)商 更新時(shí)間2025-3-20 13:30:00

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