Octal 3-State Inverting Buffer/Line Driver/Line Receiver

High?Performance Silicon?Gate CMOS

The MC74HC240A is identical in pinout to the LS240. The device inputs are compatible with standard CMOS outputs; with pullup resistors, they are compatible with LSTTL outputs.

This octal noninverting buffer/line driver/line receiver is designed to be used with 3?state memory address drivers, clock drivers, and other sub?oriented systems. The device has inverting outputs and two active?low output enables.

The HC240A is similar in function to the HC244A.

Features

? Output Drive Capability: 15 LSTTL Loads

? Outputs Directly Interface to CMOS, NMOS, and TTL

? Operating Voltage Range: 2.0 to 6.0 V

? Low Input Current: 1 A

? High Noise Immunity Characteristic of CMOS Devices

? In Compliance with the Requirements Defined by JEDEC Standard

No. 7 A

? Chip Complexity: 120 FETs or 30 Equivalent Gates

? NLV Prefix for Automotive and Other Applications Requiring

Unique Site and Control Change Requirements; AEC?Q100

Qualified and PPAP Capable

? These Devices are Pb?Free, Halogen Free and are RoHS Compliant

MC74HC240ADT屬于集成電路（IC） > 緩沖器，驅(qū)動器，接收器，收發(fā)器。安森美半導(dǎo)體公司制造生產(chǎn)的MC74HC240ADT緩沖器，驅(qū)動器，接收器，收發(fā)器邏輯緩沖器、驅(qū)動器、接收器和收發(fā)器允許隔離對某個電路的邏輯信號的訪問，以用于另一電路。緩沖器將其輸入信號（不變或反相）傳遞到其輸出，并可能用于清除弱信號或驅(qū)動負載。在布爾邏輯仿真器中，緩沖器主要用于增加傳播延遲。邏輯接收器和收發(fā)器允許在數(shù)據(jù)總線之間進行隔離通信。