Hex D Flip?Flop with Common Clock and Reset

High–Performance Silicon–Gate CMOS

The MC54/74HC174A is identical in pinout to the LS174. The device inputs are compatible with standard CMOS outputs; with pullup resistors, they are compatible with LSTTL outputs.

This device consists of six D flip–flops with common Clock and Reset inputs. Each flip–flop is loaded with a low–to–high transition of the Clock input. Reset is asynchronous and active–low.

? Output Drive Capability: 10 LSTTL Loads

? TTL NMOS Compatible Input Levels

? Outputs Directly Interface to CMOS, NMOS, and TTL

? Operating Voltage Range: 4.5 to 5.5 V

? Low Input Current: 1.0 μA

? In Compliance with the Requirements Defined by JEDEC Standard No. 7A

? Chip Complexity: 162 FETs or 40.5 Equivalent Gates