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MC14049UB_V01中文資料安森美半導(dǎo)體數(shù)據(jù)手冊(cè)PDF規(guī)格書(shū)
| 廠商型號(hào) |
MC14049UB_V01 |
| 功能描述 | Hex Buffers |
| 文件大小 |
201.15 Kbytes |
| 頁(yè)面數(shù)量 |
7 頁(yè) |
| 生產(chǎn)廠商 | ON Semiconductor |
| 企業(yè)簡(jiǎn)稱 |
ONSEMI【安森美半導(dǎo)體】 |
| 中文名稱 | 安森美半導(dǎo)體公司官網(wǎng) |
| 原廠標(biāo)識(shí) |  |
| 數(shù)據(jù)手冊(cè) | |
| 更新時(shí)間 | 2025-2-25 20:42:00 |
| 人工找貨 | MC14049UB_V01價(jià)格和庫(kù)存，歡迎聯(lián)系客服免費(fèi)人工找貨 |
MC14049UB_V01規(guī)格書(shū)詳情
The MC14049UB hex inverter/buffer is constructed with MOS
P?channel and N?channel enhancement mode devices in a single
monolithic structure. This complementary MOS device finds primary
use where low power dissipation and/or high noise immunity is
desired. This device provides logic?level conversion using only one
supply voltage, VDD. The input?signal high level (VIH) can exceed the
VDD supply voltage for logic?level conversions. Two TTL/DTL
Loads can be driven when the device is used as CMOS?to?TTL/DTL
converters (VDD = 5.0 V, VOL ≤ 0.4 V, IOL ≥ 3.2 mA). Note that pins
13 and 16 are not connected internally on this device; consequently
connections to these terminals will not affect circuit operation.
Features
? High Source and Sink Currents
? High?to?Low Level Converter
? Supply Voltage Range = 3.0 V to 18 V
? Meets JEDEC UB Specifications
? VIN can exceed VDD
? Improved ESD Protection on All Inputs
? These Devices are Pb?Free and are RoHS Compliant
? NLV Prefix for Automotive and Other Applications Requiring
Unique Site and Control Change Requirements; AEC?Q100
Qualified and PPAP Capable
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76 |
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9526 |
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