Description

The MC10/100EP33 is an integrated ÷4 divider. The differential clock inputs.

The VBB pin, an internally generated voltage supply, is available to this device only. For single-ended input conditions, the unused differential input is connected to VBB as a switching reference voltage. VBB may also rebias AC coupled inputs. When used, decouple VBB and VCC via a 0.01 F capacitor and limit current sourcing or sinking to 0.5 mA. When not used, VBB should be left open.

The reset pin is asynchronous and is asserted on the rising edge. Upon powerup, the internal flip?flops will attain a random state; the reset allows for the synchronization of multiple EP33’s in a system.

The 100 Series contains temperature compensation.

Features

? 320 ps Propagation Delay

? Maximum Frequency > 4 GHz Typical

? PECL Mode Operating Range: VCC = 3.0 V to 5.5 V with VEE = 0 V

? NECL Mode Operating Range: VCC = 0 V with VEE = ?3.0 V to ?5.5 V

? Open Input Default State

? Safety Clamp on Inputs

? Q Output Will Default LOW with Inputs Open or at VEE

? VBB Output

? Pb?Free Packages are Available

MC10EP33屬于集成電路（IC） > 計(jì)數(shù)器，除法器。安森美半導(dǎo)體公司制造生產(chǎn)的MC10EP33計(jì)數(shù)器，除法器計(jì)數(shù)器和除法器 IC 是數(shù)字邏輯器件，可對輸入發(fā)生的邏輯轉(zhuǎn)換進(jìn)行計(jì)數(shù)，然后使用多個(gè)并行輸出重新發(fā)送累加的計(jì)數(shù)，和/或生成單個(gè)輸出信號轉(zhuǎn)換，從而對應(yīng)用某些整數(shù)數(shù)量輸入信號轉(zhuǎn)換進(jìn)行響應(yīng)。除了簡單的事件計(jì)數(shù)，它們還可用于各種頻率合成應(yīng)用。