MC10EP16DR2集成電路（IC）的專用邏輯器件規(guī)格書PDF中文資料

MC10EP16DR2屬于集成電路（IC）的專用邏輯器件。由安森美半導(dǎo)體公司制造生產(chǎn)的MC10EP16DR2專用邏輯器件專用邏輯 IC 設(shè)計提供應(yīng)用特定的邏輯輸出類型，例如 BCD 速率倍增、可尋址掃描端口、總線終端陣列、CML 驅(qū)動器、比較器、ABT 掃描測試、二進(jìn)制全加法器、互補(bǔ)對加逆變器、可配置緩沖器、觸點顫動消除器、晶體振蕩器、延遲元件、差分接收器、LVTTL 到 GTLP 收發(fā)器、存儲器解碼器、電源良好檢測器和分頻器。

Description

The EP16 is a world?class differential receiver/driver. The device is functionally equivalent to the EL16 and LVEL16 devices with higher performance capabilities. With output transition times significantly faster than the EL16 and LVEL16, the EP16 is ideally suited for interfacing with high frequency sources. The VBB pin, an internally generated voltage supply, is available to this device only. For single-ended input conditions, the unused differential input is connected to VBB as a switching reference voltage. VBB may also rebias AC coupled inputs. When used, decouple VBB and VCC via a 0.01 F capacitor and limit current sourcing or sinking to 0.5 mA. When not used, VBB should be left open. Under open input conditions (pulled to VEE) internal input clamps will force the Q output LOW. The 100 Series contains temperature compensation.

Features

? 220 ps Typical Propagation Delay

? Maximum Frequency > 4 GHz Typical

? PECL Mode Operating Range: VCC = 3.0 V to 5.5 V with VEE = 0 V

? NECL Mode Operating Range: VCC = 0 V with VEE = ?3.0 V to ?5.5 V

? Open Input Default State

? Safety Clamp on Inputs

? Q Output Will Default LOW with Inputs Open or at VEE

? VBB Output

? Pb?Free Packages are Available