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MC10210P中文資料Motorola數(shù)據(jù)手冊PDF規(guī)格書

MC10210P
廠商型號

MC10210P

功能描述

Dual 3-Input/3-Output OR Gate

文件大小

71.59 Kbytes

頁面數(shù)量

5

生產(chǎn)廠商 Motorola, Inc
企業(yè)簡稱

Motorola

中文名稱

Motorola, Inc官網(wǎng)

原廠標(biāo)識
數(shù)據(jù)手冊

下載地址一下載地址二到原廠下載

更新時間

2024-11-20 19:00:00

MC10210P規(guī)格書詳情

The MC10210 is designed to drive up to six transmission lines simultaneously. The multiple outputs of this device also allow the wire “OR” –ing of several levels of gating for minimization of gate and package count.

The ability to control three parallel lines with minimum propagation delay from a single point makes the MC10210 particularly useful in clock distribution applications where minimum clock skew is desired.

PD = 160 mW typ/pkg (No Loads)

tpd = 1.5 ns typ (All Output Loaded)

tr, tf = 1.5 ns typ (20–80)

產(chǎn)品屬性

  • 型號:

    MC10210P

  • 制造商:

    Motorola Inc

  • 制造商:

    MOT 81+

  • 功能描述:

    Logic Circuit, Dual 3-Input OR, 16 Pin, Plastic, DIP

  • 制造商:

    Motorola Inc

供應(yīng)商 型號 品牌 批號 封裝 庫存 備注 價格
23+
DIP
20000
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20+
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35830
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24+
3000
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23+
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9526
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1822+
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9852
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22+
2250
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3000
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