M66305AP中文資料三菱電機(jī)數(shù)據(jù)手冊PDF規(guī)格書

DESCRIPTION

M66305A Toggle Line Buffer has two 5,120-bit line buffer memories. It takes in serial data that arrives synchronously with clock pulses and outputs it in serial at a rate of up to 10 Mbits per second synchronously with external clock pulses. This buffer employs the double buffer system: While data is being output, data on the next line can be written on the other line buffer memory.

FEATURES

? 5,120 × 1bit serial input-serial output line buffer memories

? Data transmission at 10 megabits/second maximum

? Two line buffer memories can be alternated by external toggle signal.

? Memory capacity can be doubled by cascade connection.

? Because of cascade input pin (CAS1), output potential after completion of output can be set to either H or L.

? Low noise and high fan-out output (IO = ±24mA guaranteed)

? Every input pin has built-in Schmidt trigger circuit.

? Read counter and write counter can be reset independently.

? RESET, T, CNTRST1 and CNTRST2 are equipped with negative noise reduction circuit.

APPLICATION

Data buffer between industrial or home-use image data processing system and peripheral equipment