M54HC563中文資料意法半導(dǎo)體數(shù)據(jù)手冊(cè)PDF規(guī)格書

DESCRIPTION

The M54/74HC563 and M54HC573 are high speed CMOS OCTAL LATCH WITH 3-STATE OUTPUTS fabricated with in silicon gate C2MOS technology.

These ICs archive the high speed operation similar to equivalent LSTTL while maintaning the CMOS low power dissipation.

■ HIGH SPEED

tPD = 13 ns (TYP.) AT VCC = 5 V

■ LOW POWER DISSIPATION

ICC = 4 μA (MAX.) AT TA = 25 °C

■ HIGH NOISE IMMUNITY

VNIH = VNIL = 28 VCC (MIN.)

■ OUTPUT DRIVE CAPABILITY

15 LSTTL LOADS

■ SYMMETRICAL OUTPUT IMPEDANCE

IOL = |IOH|?= 6 mA (MIN.)

■ BALANCED PROPAGATION DELAYS

tPLH = tPHL

■ WIDE OPERATING VOLTAGE RANGE

VCC (OPR) = 2 V TO 6 V

■ PIN AND FUNCTION COMPATIBLE

WITH 54/74LS563/573