M54HC533B1R中文資料意法半導(dǎo)體數(shù)據(jù)手冊(cè)PDF規(guī)格書(shū)

DESCRIPTION

The M54/74HC373/533 are high speed CMOS OCTAL LATCH WITH 3-STATE OUTPUTS fabricated with in silicon gate C2MOS technology.

These ICs achive the high speed operation similar to equivalent LSTTL while maintaning the CMOS low power dissipation.

The application designer has a choise of combination of inverting and non inverting outputs.

The three state output configuration and the wide choise of outline make bus organized system simple.

All inputs are equipped with protection circuits against discharge and transient excess voltage.

■ HIGH SPEED tPD = 11 ns (TYP.) AT VCC = 5 V

■ LOW POWER DISSIPATION ICC = 4 μA (MAX.) AT TA = 25 °C

■ HIGH NOISE IMMUNITY VNIH = VNIL = 28 VCC (MIN.)

■ OUTPUT DRIVE CAPABILITY 15 LSTTL LOADS

■ SYMMETRICAL OUTPUT IMPEDANCE IOL = ?IOH?= 6 mA (MIN.)

■ BALANCED PROPAGATION DELAYS tPLH = tPHL

■ WIDE OPERATING VOLTAGE RANGE VCC (OPR) = 2 V TO 6 V

■ PIN AND FUNCTION COMPATIBLE WITH 54/74LS373/533