M48Z35AV集成電路（IC）的存儲(chǔ)器規(guī)格書(shū)PDF中文資料

M48Z35AV屬于集成電路（IC）的存儲(chǔ)器。由意法半導(dǎo)體集團(tuán)制造生產(chǎn)的M48Z35AV存儲(chǔ)器存儲(chǔ)器是集成電路上用作數(shù)據(jù)存儲(chǔ)設(shè)備的半導(dǎo)體器件。這些器件分為非易失性或易失性?xún)煞N，格式包括 CBRAM、DRAM、EEPROM、EERAM、EPROM、閃存、FRAM、NVSRAM、PCM (PRAM)、PSRAM、RAM 和 SRAM。這些器件的存儲(chǔ)容量為 64 b 至 6 Tb 不等，接口有 I2C、MMC、并行、eMMC、串行、單線(xiàn)、SPI、UFS、Xccela 總線(xiàn)和 1-線(xiàn)。

Summary

The M48Z35AV ZEROPOWER? RAM is a 32Kbit x 8, non-volatile static RAM that integrates power-fail deselect circuitry and battery control logic on a single die. The monolithic chip is available in two special packages to provide a highly integrated battery backed-up memory solution.

Features

■ Integrated, ultra low power SRAM, power-fail control circuit, and battery

■ READ cycle time equals WRITE cycle time

■ Battery low flag (BOK)

■ Automatic power-fail chip deselect and WRITE protection

■ WRITE protect voltage: (VPFD= Power-fail deselect voltage)

– M48Z35AV: 2.7V ≤VPFD ≤3.0V

■ Self-contained battery in the CAPHAT? DIP package

■ Packaging includes a 28-lead SOIC and SNAPHAT? top (to be ordered separately)

■ Pin and function compatible with JEDEC standard 32Kbit x 8 SRAMs

■ SOIC package provides direct connection for a SNAPHAT top which contains the battery

■ RoHS compliant

– Lead-free second level interconnect