M40Z111WMH6TR中文資料意法半導(dǎo)體數(shù)據(jù)手冊PDF規(guī)格書

Description

The M40Z111/W NVRAM supervisor is a self-contained device which converts a standard low-power SRAM into a non-volatile memory.

A precision voltage reference and comparator monitors the VCC input for an out-of-tolerance condition.

When an invalid VCC condition occurs, the conditioned chip enable (ECON) output is forced inactive to write-protect the stored data in the SRAM.

During a power failure, the SRAM is switched from the VCC pin to the lithium cell within the SNAPHAT? to provide the energy required for data retention. On a subsequent power-up, the SRAM remains write protected until a valid power condition returns.

The 28-pin, 330 mil SOIC provides sockets with gold plated contacts at both ends for direct connection to a separate SNAPHAT housing containing the battery. The unique design allows the SNAPHAT battery package to be mounted on top of the SOIC package after the completion of the surface mount process.

Features

■ Convert low power SRAMs into NVRAMs

■ Precision power monitoring and power switching circuitry

■ Automatic write-protection when VCC is out-oftolerance

■ Choice of supply voltages and power-fail deselect voltages:

– M40Z111: VCC = 4.5 to 5.5 V

THS = VSS; 4.5 ≤ VPFD ≤ 4.75 V

THS = VOUT; 4.2 ≤ VPFD ≤ 4.5 V

– M40Z111W: VCC = 3.0 to 3.6 V

THS = VSS; 2.8 ≤ VPFD ≤ 3.0 V

VCC = 2.7 to 3.3 V

THS = VOUT; 2.5 ≤ VPFD ≤ 2.7 V

■ Less than 15 ns chip enable access

propagation delay (for 5.0 V device)

■ Packaging includes a 28-lead SOIC and

SNAPHAT? top (to be ordered separately)

■ SOIC package provides direct connection for a

SNAPHAT top which contains the battery

■ RoHS compliant

– Lead-free second level interconnect