1 Features

? Provides bidirectional voltage translation with no

direction pin

? Supports up to 100-MHz up translation and greater

than 100-MHz down translation at

≤ 30 pF cap load and up To 40-MHz up/down

translation at 50 pF cap load

? Allows bidirectional voltage-level translation

between

– 0.95 V ? 1.8/2.5/3.3/5 V

– 1.2 V ? 1.8/2.5/3.3/5 V

– 1.8 V ? 2.5/3.3/5 V

– 2.5 V ? 3.3/5 V

– 3.3 V ? 5 V

? Low standby current

? 5-V tolerance I/O port to support TTL

? Low RON provides less signal distortion

? High-impedance I/O pins for EN = Low

? Flow-through pinout for easy PCB trace routing

? Latch-up performance >100 mA per JESD 17

? –40°C to 125°C operating temperature range

2 Applications

? GPIO, MDIO, PMBus, SMBus, SDIO, UART, I2C,

and other interfaces in telecom infrastructure

? Enterprise systems

? Communications equipment

? Personal electronics

? Industrial applications

3 Description

The LSF family of devices supports bidirectional

voltage translation without the need for DIR pin which

minimizes system effort (for PMBus, I2C, SMBus, and

so forth). The LSF family of devices supports up to

100-MHz up translation and greater than 100-MHz

down translation at ≤ 30 pF cap load and up to 40-

MHz up/down translation at 50 pF cap load which

allows the LSF family to support more consumer or

telecom interfaces (MDIO or SDIO).

LSF family supports 5-V tolerance on I/O port which

makes it compatible with TTL levels in industrial and

telecom applications. The LSF family is able to set

up different voltage translation levels on each channel

which makes it very flexible.

LSF0102DQER屬于集成電路（IC） > 轉(zhuǎn)換器，電平移位器。美國德州儀器公司制造生產(chǎn)的LSF0102DQER轉(zhuǎn)換器，電平移位器邏輯轉(zhuǎn)換器或電平移位器 IC 可用于在數(shù)字邏輯設(shè)備之間傳遞信息，這些設(shè)備可在不同/不兼容的供電電壓下工作，或可實現(xiàn)不同的信令方式。例如，可以將需要 5 V 電源的數(shù)字輸出傳感器連接到具有 3.3 V I/O 電源的 FPGA，或者在 CMOS 或 TTL 等單端信令方式與 PECL 或 LVDS 等差分技術(shù)之間進行轉(zhuǎn)換。