LMK04828集成電路(IC)的時(shí)鐘發(fā)生器PLL頻率合成器規(guī)格書PDF中文資料
廠商型號(hào) |
LMK04828 |
參數(shù)屬性 | LMK04828 封裝/外殼為64-WFQFN 裸露焊盤;包裝為托盤;類別為集成電路(IC)的時(shí)鐘發(fā)生器PLL頻率合成器;產(chǎn)品描述:IC CLOCK DUAL PLL 64-WQFN |
功能描述 | LMK04828-EP Ultra-Low-Noise, JESD204B-Compliant Clock Jitter Cleaner |
封裝外殼 | 64-WFQFN 裸露焊盤 |
文件大小 |
1.76875 Mbytes |
頁(yè)面數(shù)量 |
102 頁(yè) |
生產(chǎn)廠商 | Texas Instruments |
企業(yè)簡(jiǎn)稱 |
TI【德州儀器】 |
中文名稱 | 美國(guó)德州儀器公司官網(wǎng) |
原廠標(biāo)識(shí) | |
數(shù)據(jù)手冊(cè) | |
更新時(shí)間 | 2025-1-20 13:52:00 |
LMK04828規(guī)格書詳情
1 Features
1? EP Features
– Gold Bondwires
– Temperature Range: –55 to +105 °C
– Lead Finish SnPb
? Maximum Distribution Frequency: 3.2 GHz
? JESD204B Support
? Ultra-Low RMS Jitter
– 88-fs RMS Jitter (12 kHz to 20 MHz)
– 91-fs RMS Jitter (100 Hz to 20 MHz)
– –162.5 dBc/Hz Noise Floor at 245.76 MHz
? Up to 14 Differential Device Clocks From PLL2
– Up to 7 SYSREF Clocks
– Maximum Clock Output Frequency 3.2 GHz
– LVPECL, LVDS, HSDS, LCPECL
Programmable Outputs From PLL2
? Up to 1 Buffered VCXO/Crystal Output From PLL1
– LVPECL, LVDS, 2xLVCMOS Programmable
? Multi-Mode: Dual PLL, Single PLL, and Clock
Distribution
? Dual Loop PLLatinum? PLL Architecture
? PLL1
– Up to 3 Redundant Input Clocks
– Automatic and Manual Switchover Modes
– Hitless Switching and LOS
– Integrated Low-Noise Crystal Oscillator Circuit
– Holdover Mode When Input Clocks are Lost
? PLL2
– Normalized [1 Hz] PLL Noise Floor of
–227 dBc/Hz
– Phase Detector Rate up to 155 MHz
– OSCin Frequency-Doubler
– Two Integrated Low-Noise VCOs
? 50 Duty Cycle Output Divides, 1 to 32
(Even and Odd)
? Precision Digital Delay, Dynamically Adjustable
? 25-ps Step Analog Delay
? 3.15-V to 3.45-V Operation
? Package: 64-Pin WQFN (9.0 mm × 9.0 mm × 0.8
mm)
2 Applications
? Wireless Infrastructure
? Data Converter Clocking
? Networking, SONET/SDH, DSLAM
? Medical / Video / Military / Aerospace
? Test and Measurement
3 Description
The LMK04828-EP device is the industry's highest
performance clock conditioner with JESD204B
support.
The 14 clock outputs from PLL2 can be configured to
drive seven JESD204B converters or other logic
devices using device and SYSREF clocks. SYSREF
can be provided using both DC and AC coupling. Not
limited to JESD204B applications, each of the 14
outputs can be individually configured as highperformance
outputs for traditional clocking systems.
The high performance combined with features like the
ability to trade off between power or performance,
dual VCOs, dynamic digital delay, holdover, and
glitchless analog delay make the LMK04828-EP ideal
for providing flexible high-performance clocking trees.
產(chǎn)品屬性
- 產(chǎn)品編號(hào):
LMK04828BISQ/NOPB
- 制造商:
Texas Instruments
- 類別:
集成電路(IC) > 時(shí)鐘發(fā)生器,PLL,頻率合成器
- 系列:
PLLatinum?
- 包裝:
托盤
- 類型:
抖動(dòng)消除器
- PLL:
是
- 輸入:
LVCMOS,LVDS,LVPECL
- 輸出:
HSDS,LCPECL,LVCMOS,LVDS,LVPECL
- 比率 - 輸入:
3:15
- 差分 - 輸入:
是/是
- 頻率 - 最大值:
3.08GHz
- 分頻器/倍頻器:
是/無
- 電壓 - 供電:
3.15V ~ 3.45V
- 工作溫度:
-40°C ~ 85°C
- 安裝類型:
表面貼裝型
- 封裝/外殼:
64-WFQFN 裸露焊盤
- 供應(yīng)商器件封裝:
64-WQFN(9x9)
- 描述:
IC CLOCK DUAL PLL 64-WQFN
供應(yīng)商 | 型號(hào) | 品牌 | 批號(hào) | 封裝 | 庫(kù)存 | 備注 | 價(jià)格 |
---|---|---|---|---|---|---|---|
TI/德州儀器 |
23+/24+ |
NV |
2024927 |
明嘉萊只做原裝正品現(xiàn)貨 |
詢價(jià) | ||
TI |
專業(yè)軍工 |
NA |
1000 |
只做原裝正品軍工級(jí)部分訂貨 |
詢價(jià) | ||
TI/德州儀器 |
22+ |
WQFN-64 |
13000 |
原裝正品 |
詢價(jià) | ||
TI |
21+ |
WQFN64 |
5000 |
原裝現(xiàn)貨/假一賠十/支持第三方檢驗(yàn) |
詢價(jià) | ||
TI |
24+ |
WQFN|64 |
8230 |
免費(fèi)送樣原盒原包現(xiàn)貨一手渠道聯(lián)系 |
詢價(jià) | ||
TI(德州儀器) |
23+ |
NA/ |
7350 |
現(xiàn)貨供應(yīng),當(dāng)天可交貨!免費(fèi)送樣,原廠技術(shù)支持!!! |
詢價(jià) | ||
TI |
24+ |
WQFN64 |
65300 |
一級(jí)代理/放心采購(gòu) |
詢價(jià) | ||
TexasInstruments |
2023+ |
新 |
80000 |
一級(jí)代理/分銷渠道價(jià)格優(yōu)勢(shì) 十年芯程一路只做原裝正品 |
詢價(jià) | ||
TI/德州儀器 |
22+ |
WQFN-64 |
9600 |
原裝現(xiàn)貨,優(yōu)勢(shì)供應(yīng),支持實(shí)單! |
詢價(jià) | ||
TI/德州儀器 |
24+ |
WQFN64 |
15050 |
原廠支持公司優(yōu)勢(shì)現(xiàn)貨 |
詢價(jià) |
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