首頁 >ISPLSI2032>規(guī)格書列表
零件編號 | 下載&訂購 | 功能描述 | 制造商&上傳企業(yè) | LOGO |
---|---|---|---|---|
ISPLSI2032 | In-System Programmable High Density PLD Description TheispLSI2032and2032AareHighDensityProgrammableLogicDevices.Thedevicescontain32Registers,32UniversalI/Opins,twoDedicatedInputPins,threeDedicatedClockInputPins,onededicatedGlobalOEinputpinandaGlobalRoutingPool(GRP).TheGRPprovidescompletein | LatticeLattice Semiconductor 萊迪思萊迪思半導(dǎo)體公司 | Lattice | |
In-System Programmable High Density PLD Description TheispLSI2032and2032AareHighDensityProgrammableLogicDevices.Thedevicescontain32Registers,32UniversalI/Opins,twoDedicatedInputPins,threeDedicatedClockInputPins,onededicatedGlobalOEinputpinandaGlobalRoutingPool(GRP).TheGRPprovidescompletein | LatticeLattice Semiconductor 萊迪思萊迪思半導(dǎo)體公司 | Lattice | ||
In-System Programmable High Density PLD Description TheispLSI2032and2032AareHighDensityProgrammableLogicDevices.Thedevicescontain32Registers,32UniversalI/Opins,twoDedicatedInputPins,threeDedicatedClockInputPins,onededicatedGlobalOEinputpinandaGlobalRoutingPool(GRP).TheGRPprovidescompletein | LatticeLattice Semiconductor 萊迪思萊迪思半導(dǎo)體公司 | Lattice | ||
In-System Programmable High Density PLD Description TheispLSI2032and2032AareHighDensityProgrammableLogicDevices.Thedevicescontain32Registers,32UniversalI/Opins,twoDedicatedInputPins,threeDedicatedClockInputPins,onededicatedGlobalOEinputpinandaGlobalRoutingPool(GRP).TheGRPprovidescompletein | LatticeLattice Semiconductor 萊迪思萊迪思半導(dǎo)體公司 | Lattice | ||
In-System Programmable High Density PLD Description TheispLSI2032and2032AareHighDensityProgrammableLogicDevices.Thedevicescontain32Registers,32UniversalI/Opins,twoDedicatedInputPins,threeDedicatedClockInputPins,onededicatedGlobalOEinputpinandaGlobalRoutingPool(GRP).TheGRPprovidescompletein | LatticeLattice Semiconductor 萊迪思萊迪思半導(dǎo)體公司 | Lattice | ||
In-System Programmable High Density PLD Description TheispLSI2032and2032AareHighDensityProgrammableLogicDevices.Thedevicescontain32Registers,32UniversalI/Opins,twoDedicatedInputPins,threeDedicatedClockInputPins,onededicatedGlobalOEinputpinandaGlobalRoutingPool(GRP).TheGRPprovidescompletein | LatticeLattice Semiconductor 萊迪思萊迪思半導(dǎo)體公司 | Lattice | ||
In-System Programmable High Density PLD Description TheispLSI2032and2032AareHighDensityProgrammableLogicDevices.Thedevicescontain32Registers,32UniversalI/Opins,twoDedicatedInputPins,threeDedicatedClockInputPins,onededicatedGlobalOEinputpinandaGlobalRoutingPool(GRP).TheGRPprovidescompletein | LatticeLattice Semiconductor 萊迪思萊迪思半導(dǎo)體公司 | Lattice | ||
In-System Programmable High Density PLD Description TheispLSI2032and2032AareHighDensityProgrammableLogicDevices.Thedevicescontain32Registers,32UniversalI/Opins,twoDedicatedInputPins,threeDedicatedClockInputPins,onededicatedGlobalOEinputpinandaGlobalRoutingPool(GRP).TheGRPprovidescompletein | LatticeLattice Semiconductor 萊迪思萊迪思半導(dǎo)體公司 | Lattice | ||
In-System Programmable High Density PLD Description TheispLSI2032and2032AareHighDensityProgrammableLogicDevices.Thedevicescontain32Registers,32UniversalI/Opins,twoDedicatedInputPins,threeDedicatedClockInputPins,onededicatedGlobalOEinputpinandaGlobalRoutingPool(GRP).TheGRPprovidescompletein | LatticeLattice Semiconductor 萊迪思萊迪思半導(dǎo)體公司 | Lattice | ||
In-System Programmable High Density PLD Description TheispLSI2032and2032AareHighDensityProgrammableLogicDevices.Thedevicescontain32Registers,32UniversalI/Opins,twoDedicatedInputPins,threeDedicatedClockInputPins,onededicatedGlobalOEinputpinandaGlobalRoutingPool(GRP).TheGRPprovidescompletein | LatticeLattice Semiconductor 萊迪思萊迪思半導(dǎo)體公司 | Lattice | ||
In-System Programmable High Density PLD Description TheispLSI2032and2032AareHighDensityProgrammableLogicDevices.Thedevicescontain32Registers,32UniversalI/Opins,twoDedicatedInputPins,threeDedicatedClockInputPins,onededicatedGlobalOEinputpinandaGlobalRoutingPool(GRP).TheGRPprovidescompletein | LatticeLattice Semiconductor 萊迪思萊迪思半導(dǎo)體公司 | Lattice | ||
In-System Programmable High Density PLD Description TheispLSI2032and2032AareHighDensityProgrammableLogicDevices.Thedevicescontain32Registers,32UniversalI/Opins,twoDedicatedInputPins,threeDedicatedClockInputPins,onededicatedGlobalOEinputpinandaGlobalRoutingPool(GRP).TheGRPprovidescompletein | LatticeLattice Semiconductor 萊迪思萊迪思半導(dǎo)體公司 | Lattice | ||
In-System Programmable High Density PLD Description TheispLSI2032and2032AareHighDensityProgrammableLogicDevices.Thedevicescontain32Registers,32UniversalI/Opins,twoDedicatedInputPins,threeDedicatedClockInputPins,onededicatedGlobalOEinputpinandaGlobalRoutingPool(GRP).TheGRPprovidescompletein | LatticeLattice Semiconductor 萊迪思萊迪思半導(dǎo)體公司 | Lattice | ||
In-System Programmable High Density PLD Description TheispLSI2032and2032AareHighDensityProgrammableLogicDevices.Thedevicescontain32Registers,32UniversalI/Opins,twoDedicatedInputPins,threeDedicatedClockInputPins,onededicatedGlobalOEinputpinandaGlobalRoutingPool(GRP).TheGRPprovidescompletein | LatticeLattice Semiconductor 萊迪思萊迪思半導(dǎo)體公司 | Lattice | ||
In-System Programmable High Density PLD Description TheispLSI2032and2032AareHighDensityProgrammableLogicDevices.Thedevicescontain32Registers,32UniversalI/Opins,twoDedicatedInputPins,threeDedicatedClockInputPins,onededicatedGlobalOEinputpinandaGlobalRoutingPool(GRP).TheGRPprovidescompletein | LatticeLattice Semiconductor 萊迪思萊迪思半導(dǎo)體公司 | Lattice | ||
In-System Programmable High Density PLD Description TheispLSI2032and2032AareHighDensityProgrammableLogicDevices.Thedevicescontain32Registers,32UniversalI/Opins,twoDedicatedInputPins,threeDedicatedClockInputPins,onededicatedGlobalOEinputpinandaGlobalRoutingPool(GRP).TheGRPprovidescompletein | LatticeLattice Semiconductor 萊迪思萊迪思半導(dǎo)體公司 | Lattice | ||
In-System Programmable High Density PLD Description TheispLSI2032and2032AareHighDensityProgrammableLogicDevices.Thedevicescontain32Registers,32UniversalI/Opins,twoDedicatedInputPins,threeDedicatedClockInputPins,onededicatedGlobalOEinputpinandaGlobalRoutingPool(GRP).TheGRPprovidescompletein | LatticeLattice Semiconductor 萊迪思萊迪思半導(dǎo)體公司 | Lattice | ||
In-System Programmable High Density PLD Description TheispLSI2032and2032AareHighDensityProgrammableLogicDevices.Thedevicescontain32Registers,32UniversalI/Opins,twoDedicatedInputPins,threeDedicatedClockInputPins,onededicatedGlobalOEinputpinandaGlobalRoutingPool(GRP).TheGRPprovidescompletein | LatticeLattice Semiconductor 萊迪思萊迪思半導(dǎo)體公司 | Lattice | ||
In-System Programmable High Density PLD Description TheispLSI2032and2032AareHighDensityProgrammableLogicDevices.Thedevicescontain32Registers,32UniversalI/Opins,twoDedicatedInputPins,threeDedicatedClockInputPins,onededicatedGlobalOEinputpinandaGlobalRoutingPool(GRP).TheGRPprovidescompletein | LatticeLattice Semiconductor 萊迪思萊迪思半導(dǎo)體公司 | Lattice | ||
In-System Programmable High Density PLD Description TheispLSI2032and2032AareHighDensityProgrammableLogicDevices.Thedevicescontain32Registers,32UniversalI/Opins,twoDedicatedInputPins,threeDedicatedClockInputPins,onededicatedGlobalOEinputpinandaGlobalRoutingPool(GRP).TheGRPprovidescompletein | LatticeLattice Semiconductor 萊迪思萊迪思半導(dǎo)體公司 | Lattice |
詳細參數(shù)
- 型號:
ISPLSI2032
- 功能描述:
CPLD - 復(fù)雜可編程邏輯器件 USE ispMACH 4000V
- RoHS:
否
- 制造商:
Lattice
- 存儲類型:
EEPROM
- 大電池數(shù)量:
128
- 最大工作頻率:
333 MHz
- 延遲時間:
2.7 ns
- 可編程輸入/輸出端數(shù)量:
64
- 工作電源電壓:
3.3 V
- 最大工作溫度:
+ 90 C
- 最小工作溫度:
0 C
- 封裝/箱體:
TQFP-100
供應(yīng)商 | 型號 | 品牌 | 批號 | 封裝 | 庫存 | 備注 | 價格 |
---|---|---|---|---|---|---|---|
Lattice(萊迪斯) |
23+ |
標準封裝 |
8848 |
原廠渠道供應(yīng),大量現(xiàn)貨,原型號開票。 |
詢價 | ||
Lattice(萊迪斯) |
23+ |
特價 |
6000 |
一級代理,專注軍工、汽車、醫(yī)療、工業(yè)、新能源、電力 |
詢價 | ||
Lattice |
23+ |
PLCC44 |
7000 |
絕對全新原裝!現(xiàn)貨!特價!請放心訂購! |
詢價 | ||
Lattice |
04+ |
TQFP |
550 |
詢價 | |||
05+ |
原廠原裝 |
4401 |
只做全新原裝真實現(xiàn)貨供應(yīng) |
詢價 | |||
LATT |
24+ |
QFP |
2250 |
100%全新原裝公司現(xiàn)貨供應(yīng)!隨時可發(fā)貨 |
詢價 | ||
LATTICE |
24+ |
PLCC |
52 |
詢價 | |||
LATTICE |
22+ |
QFP44 |
2317 |
品牌專業(yè)分銷商,可以零售 |
詢價 | ||
LATTICE |
23+ |
QFP44 |
1022 |
專業(yè)優(yōu)勢供應(yīng) |
詢價 | ||
LATTICE |
23+ |
SOP8 |
5000 |
原裝正品,假一罰十 |
詢價 |
相關(guān)規(guī)格書
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相關(guān)庫存
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