IDT74FCT16374TPAB中文資料IDT數(shù)據(jù)手冊(cè)PDF規(guī)格書

DESCRIPTION:

The FCT16374T/AT/CT/ET and FCT162374T/AT/CT/ET 16-bit edge-triggered D-type registers are built using advanced dual metal CMOS technology. These high-speed, low-power registers are ideal for use as buffer registers for data synchronization and storage. The Output Enable (xOE) and clock (xCLK) controls are organized to operate each device as two 8-bit registers or one 16-bit register with common clock. Flow-through organization of signal pins simplifies layout. All inputs are designed with hysteresis for improved noise margin.

The FCT16374T/AT/CT/ET are ideally suited for driving high-capacitance loads and low-impedance backplanes. The output buffers are designed with power off disable capability to allow live insertion of boards when used as backplane drivers.

The FCT162374T/AT/CT/ET have balanced output drive with current limiting resistors. This offers low ground bounce, minimal undershoot, and controlled output fall times– reducing the need for external series terminating resistors. The FCT162374T/AT/CT/ET are plug-in replacements for the FCT16374T/AT/CT/ET and ABT16374 for on-board bus interface applications.

FEATURES:

? Common features:

– 0.5 MICRON CMOS Technology

– High-speed, low-power CMOS replacement for ABT functions

– Typical tSK(o) (Output Skew) < 250ps

– Low input and output leakage ≤1μA (max.)

– ESD > 2000V per MIL-STD-883, Method 3015;

> 200V using machine model (C = 200pF, R = 0)

– Packages include 25 mil pitch SSOP, 19.6 mil pitch TSSOP, 15.7 mil pitch TVSOP and 25 mil pitch Cerpack

– Extended commercial range of -40°C to +85°C

– VCC = 5V ±10

? Features for FCT16374T/AT/CT/ET:

– High drive outputs (-32mA IOH, 64mA IOL)

– Power off disable outputs permit “l(fā)ive insertion”

– Typical VOLP (Output Ground Bounce) < 1.0V at VCC = 5V, TA = 25°C

? Features for FCT162374T/AT/CT/ET:

– Balanced Output Drivers: ±24mA (commercial), ±16mA (military)

– Reduced system switching noise

– Typical VOLP (Output Ground Bounce)