IDT72825LB10PFI中文資料IDT數(shù)據(jù)手冊PDF規(guī)格書

廠商型號	IDT72825LB10PFI
功能描述	CMOS DUAL SyncFIFO DUAL 256 x 18, DUAL 512 x 18, DUAL 1,024 x 18, DUAL 2,048 x 18, and DUAL 4,096 x 18
文件大小	334.58 Kbytes
頁面數(shù)量	26 頁
生產(chǎn)廠商	Integrated Device Technology, Inc.
企業(yè)簡稱	IDT
中文名稱	Integrated Device Technology, Inc.官網(wǎng)
原廠標識
數(shù)據(jù)手冊	下載地址一下載地址二到原廠下載
更新時間	2025-1-15 14:09:00

DESCRIPTION:

The IDT72805LB/72815LB/72825LB/72845LB are dual 18-bit-wide synchronous (clocked) First-in, First-out (FIFO) memories.

FEATURES:

? The IDT72805LB is equivalent to two IDT72205LB 256 x 18 FIFOs

? The IDT72815LB is equivalent to two IDT72215LB 512 x 18 FIFOs

? The IDT72825LB is equivalent to two IDT72225LB 1,024 x 18 FIFOs

? The IDT72845LB is equivalent to two IDT72245LB 4,096 x 18 FIFOs

? Offers optimal combination of large capacity (8K), high speed,

design flexibility, and small footprint

? Ideal for the following applications:

- Network switching

- Two level prioritization of parallel data

- Bidirectional data transfer

- Bus-matching between 18-bit and 36-bit data paths

- Width expansion to 36-bit per package

- Depth expansion to 8,192 words per package

? 10ns read/write cycle time, 6.5ns access time

? IDT Standard or First Word Fall Through timing

? Single or double register-buffered Empty and Full Flags

? Easily expandable in depth and width

? Asynchronous or coincident Read and Write clocks

? Asynchronous or synchronous programmable Almost-Empty

and Almost-Full flags with default settings

? Half-Full flag capability

? Output Enable puts output data bus in high-impedance state

? High-performance submicron CMOS technology

? Available in the 128-pin Thin Quad Flatpack (TQFP). Also

available for the IDT72805LB/72815LB/72825LB, in the 121-lead,

16 x 16 mm plastic Ball Grid Array (PBGA)

? Industrial temperature range (–40°C to +85°C) is available

? Green parts available, see ordering information