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IC61SF12836-8.5B中文資料ICSI數(shù)據(jù)手冊PDF規(guī)格書
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DESCRIPTION
The ICSI IC61SF12832 and IC61SF12836 are high-speed synchronous static RAM designed to provide a burstable, high performance for high speed networking and communication applications. It is organized as 131,072 words by 32 bits or 36 bits, fabricated with ICSIs advanced CMOS technology. The device integrates a 2-bit burst counter, high-speed SRAM core, and high-drive capability outputs into a single monolithic circuit. All synchronous inputs pass through registers controlled by a positive-edge-triggered single clock input.
FEATURES
? Fast access times: 7.5 ns, 8 ns, 8.5 ns, 10 ns, and 12 ns
? Internal self-timed write cycle
? Individual Byte Write Control and Global Write
? Clock controlled, registered address, data inputs and control signals
? PentiumTM or linear burst sequence control using MODE input
? Three chip enables for simple depth expansion and address pipelining
? Common data inputs and data outputs
? 100-Pin TQFP (JEDEC LQFP) and 119-pin PBGA package
? Single +3.3V +10, -5 power supply
? Power-down snooze mode